{"title":"使用多问题指令的并行数字信号处理","authors":"A. Dabrowski, P. Pawlowski, T. Marciniak","doi":"10.1109/SPA.2007.5903293","DOIUrl":null,"url":null,"abstract":"This paper presents aspects of parallelism of computations in processing of signals using digital signal processors (DSPs) with multi-issue assembler instructions. We present general features of the contemporary DSPs with special attention paid to the VLIW architecture. In order to illustrate the multi-issue instruction technique we analyze performance of the fixed-point Blackfin processor by means of chosen typical signal processing tasks realized using VisualDSP++ 4.5 environment with Software Development Kit 2.01. Aspects of the floating-point processing are analyzed using Sharc and TigerSharc processors.","PeriodicalId":274617,"journal":{"name":"Signal Processing Algorithms, Architectures, Arrangements, and Applications SPA 2007","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Parallel digital signal processing using multi-issue instructions\",\"authors\":\"A. Dabrowski, P. Pawlowski, T. Marciniak\",\"doi\":\"10.1109/SPA.2007.5903293\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents aspects of parallelism of computations in processing of signals using digital signal processors (DSPs) with multi-issue assembler instructions. We present general features of the contemporary DSPs with special attention paid to the VLIW architecture. In order to illustrate the multi-issue instruction technique we analyze performance of the fixed-point Blackfin processor by means of chosen typical signal processing tasks realized using VisualDSP++ 4.5 environment with Software Development Kit 2.01. Aspects of the floating-point processing are analyzed using Sharc and TigerSharc processors.\",\"PeriodicalId\":274617,\"journal\":{\"name\":\"Signal Processing Algorithms, Architectures, Arrangements, and Applications SPA 2007\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Signal Processing Algorithms, Architectures, Arrangements, and Applications SPA 2007\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPA.2007.5903293\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Signal Processing Algorithms, Architectures, Arrangements, and Applications SPA 2007","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPA.2007.5903293","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
本文介绍了使用带有多问题汇编指令的数字信号处理器(dsp)处理信号时计算并行性的各个方面。我们介绍了当代dsp的一般特征,并特别关注了VLIW架构。为了说明多问题指令技术,我们选择了在VisualDSP++ 4.5环境下使用Software Development Kit 2.01实现的典型信号处理任务,分析了定点Blackfin处理器的性能。使用Sharc和TigerSharc处理器分析了浮点处理的各个方面。
Parallel digital signal processing using multi-issue instructions
This paper presents aspects of parallelism of computations in processing of signals using digital signal processors (DSPs) with multi-issue assembler instructions. We present general features of the contemporary DSPs with special attention paid to the VLIW architecture. In order to illustrate the multi-issue instruction technique we analyze performance of the fixed-point Blackfin processor by means of chosen typical signal processing tasks realized using VisualDSP++ 4.5 environment with Software Development Kit 2.01. Aspects of the floating-point processing are analyzed using Sharc and TigerSharc processors.