{"title":"一种采用动态复位电流源抑制噪声的复位电平控制的CMOS图像传感器","authors":"Kwang-Hyun Lee, E. Yoon","doi":"10.1109/ISSCC.2004.1332620","DOIUrl":null,"url":null,"abstract":"A 512 /spl times/ 384 CMOS image sensor in 0.18/spl mu/m 1P4M technology with 5.9/spl mu/m pixel pitch and a dynamic reset current source to compensate for kTC reset noise and fixed pattern noise is presented. A total of 390/spl mu/V(rms) readout noise, and a factor of two improvement over conventional reset is achieved. The chip operates at 1.8V and consumes 40mW excluding I/O and off-chip DAC for a single-slope ADC at 24frames/s.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A CMOS image sensor with reset level control using dynamic reset current source for noise suppression\",\"authors\":\"Kwang-Hyun Lee, E. Yoon\",\"doi\":\"10.1109/ISSCC.2004.1332620\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 512 /spl times/ 384 CMOS image sensor in 0.18/spl mu/m 1P4M technology with 5.9/spl mu/m pixel pitch and a dynamic reset current source to compensate for kTC reset noise and fixed pattern noise is presented. A total of 390/spl mu/V(rms) readout noise, and a factor of two improvement over conventional reset is achieved. The chip operates at 1.8V and consumes 40mW excluding I/O and off-chip DAC for a single-slope ADC at 24frames/s.\",\"PeriodicalId\":273317,\"journal\":{\"name\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2004.1332620\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332620","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CMOS image sensor with reset level control using dynamic reset current source for noise suppression
A 512 /spl times/ 384 CMOS image sensor in 0.18/spl mu/m 1P4M technology with 5.9/spl mu/m pixel pitch and a dynamic reset current source to compensate for kTC reset noise and fixed pattern noise is presented. A total of 390/spl mu/V(rms) readout noise, and a factor of two improvement over conventional reset is achieved. The chip operates at 1.8V and consumes 40mW excluding I/O and off-chip DAC for a single-slope ADC at 24frames/s.