数字光锁相环模型的Verilog HDL仿真框架

Y. Shan, Xin Chen, Xiaoyu Liu, Ying Zhang, Liping Ma
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引用次数: 0

摘要

数字光锁相环的结构包括电路部分和光学部分两部分。由于两部分的运行机制差异很大,仿真过程非常复杂。首先分析了数字光锁相环的信号传输过程。发现基于硬件描述语言的光学部件可简化为周期动态可调节拍信号模型,解决了光学部件建模问题。同时,为了模拟真实条件下光学器件引起的波长漂移现象,建立了动态可变抖动信号模型,减少了调试时间。最后,在数字仿真环境下,拍频信号模型和抖动信号模型均能正常工作,拍频信号和抖动信号的精度均能达到fs级。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Simulation Framework of Digital Optical Phase-Locked Loop Model in Verilog HDL
The structure of digital optical phase-locked loop includes two parts: circuit part and optical part. Since the operating mechanisms of two parts differ greatly, the simulation process is very complex. The signal transmission process of digital optical phase-locked loop is analyzed first. It is found that optical part can be simplified into a periodic dynamic adjustable beat signal model based on the hardware description language, and the problem of optical part modeling is solved. Meanwhile, to emulate the drift phenomenon of wavelength caused by optical devices under real conditions, a dynamic and variable jitter signal model is developed, which can reduce the debugging time. Finally, both the beat signal model and jitter signal model work correctly in digital simulation environment, and the accuracy of the beat signal and the jitter signal can reach fs level.
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