Structural Efficient Demultiplexer

The maximally decimated filter banks have been popularly employed in various applications. The non-maximally decimated filter banks allows the decimation factor being smaller than the number of parallel outputs to support applications requiring oversampling outputs of the filter bank. This paper presents a hardware structure of non-maximally decimated filter bank based on polyphase filtering and fast Fourier transform. This structure is derived by manipulating multirate signal flow graphs and is proven to require the same hardware complexity as that reported in the literature. The proposed structure also achieves a flexibility to allow processing different number of channels with the same hardware system.