有限状态机建模语言和相关工具，允许对FPGA设备进行快速原型设计

2017 IEEE International Workshop of Electronics, Control, Measurement, Signals and their Application to Mechatronics (ECMSM) Pub Date : 2017-05-01 DOI:10.1109/ECMSM.2017.7945900

Bertrand Vandeportaele

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引用次数: 4

摘要

VHDL硬件描述语言通常用于描述在FPGA (Field Programmable Gate Array)器件上实现的有限状态机(FSM)模型。然而，它的多功能性允许描述偏离真实FSM的行为，从而导致系统难以证明、记录和维护。

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A Finite State Machine modeling language and the associated tools allowing fast prototyping for FPGA devices

The VHDL hardware description language is commonly used to describe Finite State Machine(FSM) models to be implemented on Field Programmable Gate Array(FPGA) devices. However, its versatility permits to describe behaviors that deviate from a true FSM leading to systems that are complex to prove, to document and to maintain.

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来源期刊

2017 IEEE International Workshop of Electronics, Control, Measurement, Signals and their Application to Mechatronics (ECMSM)

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