用Cascode电流镜实现第二代电流控制电流输送:用Cascode电流镜实现CCCII

Fei Yu, Ping Li, Lei Gao, Shuo Cai, Ke Gu, Weizheng Wang
{"title":"用Cascode电流镜实现第二代电流控制电流输送:用Cascode电流镜实现CCCII","authors":"Fei Yu, Ping Li, Lei Gao, Shuo Cai, Ke Gu, Weizheng Wang","doi":"10.1109/ICCCAS.2018.8769163","DOIUrl":null,"url":null,"abstract":"A new CMOS second generation current controlled current conveyor (CCCII) structure is reported in this paper. The proposed circuit adopts cascode current mirrors, which X-terminal and Y-terminal are used MOS composite tube in series structure with good following characteristics, large linear range, low power consumption and port parasitic resistance control characteristics. Finally, the circuit is simulated by Pspice using 0.18 μm process. The linear input ranges of X-terminal and Y-terminal are −2 ~ 2 mA and −2 ~ 2 V, respectively. The offset current of Z-terminal is 0.65 μA, and the power consumption of the circuit is only 0.415 μW at 2 V supply voltage.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Second Generation Current Controlled Current Conveyor Realization Using Cascode Current Mirror : A CCCII Realization Using Cascode Current Mirror\",\"authors\":\"Fei Yu, Ping Li, Lei Gao, Shuo Cai, Ke Gu, Weizheng Wang\",\"doi\":\"10.1109/ICCCAS.2018.8769163\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new CMOS second generation current controlled current conveyor (CCCII) structure is reported in this paper. The proposed circuit adopts cascode current mirrors, which X-terminal and Y-terminal are used MOS composite tube in series structure with good following characteristics, large linear range, low power consumption and port parasitic resistance control characteristics. Finally, the circuit is simulated by Pspice using 0.18 μm process. The linear input ranges of X-terminal and Y-terminal are −2 ~ 2 mA and −2 ~ 2 V, respectively. The offset current of Z-terminal is 0.65 μA, and the power consumption of the circuit is only 0.415 μW at 2 V supply voltage.\",\"PeriodicalId\":166878,\"journal\":{\"name\":\"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCCAS.2018.8769163\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCAS.2018.8769163","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文报道了一种新的第二代CMOS电流控制电流输送机(CCCII)结构。该电路采用级联电流反射镜,x端和y端采用MOS复合管串联结构,具有跟随特性好、线性范围大、功耗低和端口寄生电阻控制特性。最后利用Pspice对该电路进行了0.18 μm工艺的仿真。x端和y端线性输入范围分别为−2 ~ 2ma和−2 ~ 2v。在2v供电电压下,z端偏置电流为0.65 μA,电路功耗仅为0.415 μW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Second Generation Current Controlled Current Conveyor Realization Using Cascode Current Mirror : A CCCII Realization Using Cascode Current Mirror
A new CMOS second generation current controlled current conveyor (CCCII) structure is reported in this paper. The proposed circuit adopts cascode current mirrors, which X-terminal and Y-terminal are used MOS composite tube in series structure with good following characteristics, large linear range, low power consumption and port parasitic resistance control characteristics. Finally, the circuit is simulated by Pspice using 0.18 μm process. The linear input ranges of X-terminal and Y-terminal are −2 ~ 2 mA and −2 ~ 2 V, respectively. The offset current of Z-terminal is 0.65 μA, and the power consumption of the circuit is only 0.415 μW at 2 V supply voltage.
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