{"title":"通过虚拟扩展改进短通道n-FET性能","authors":"D. Connelly, C. Faulkner, P. Clifton, D. Grupp","doi":"10.1109/IWJT.2005.203896","DOIUrl":null,"url":null,"abstract":"A method is presented to use electrostatic coupling from a metal of appropriate effective workfunction, separated from the extension region by a thin insulator, to create a \"virtual extension\" in doped source/drain (S/D) MOSFETs. This electrostatically induced charge layer allows for lower extension doping and increased underlap between the doped extension and the gate, \"sharpening\" the carrier profile and improving short-channel device performance. In a typical n-channel MOSFET, switching currents in clock-limiting circuit paths are predicted to be 24% higher.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Improved short-channel n-FET performance with virtual extensions\",\"authors\":\"D. Connelly, C. Faulkner, P. Clifton, D. Grupp\",\"doi\":\"10.1109/IWJT.2005.203896\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A method is presented to use electrostatic coupling from a metal of appropriate effective workfunction, separated from the extension region by a thin insulator, to create a \\\"virtual extension\\\" in doped source/drain (S/D) MOSFETs. This electrostatically induced charge layer allows for lower extension doping and increased underlap between the doped extension and the gate, \\\"sharpening\\\" the carrier profile and improving short-channel device performance. In a typical n-channel MOSFET, switching currents in clock-limiting circuit paths are predicted to be 24% higher.\",\"PeriodicalId\":307038,\"journal\":{\"name\":\"Extended Abstracts of the Fifth International Workshop on Junction Technology\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-06-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Extended Abstracts of the Fifth International Workshop on Junction Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWJT.2005.203896\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Extended Abstracts of the Fifth International Workshop on Junction Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWJT.2005.203896","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Improved short-channel n-FET performance with virtual extensions
A method is presented to use electrostatic coupling from a metal of appropriate effective workfunction, separated from the extension region by a thin insulator, to create a "virtual extension" in doped source/drain (S/D) MOSFETs. This electrostatically induced charge layer allows for lower extension doping and increased underlap between the doped extension and the gate, "sharpening" the carrier profile and improving short-channel device performance. In a typical n-channel MOSFET, switching currents in clock-limiting circuit paths are predicted to be 24% higher.