基于130nm CMOS PD-SOI的6-18GHz低噪声放大器

2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI:10.1109/ICTA56932.2022.9963072

Jialong Xue, T. Zou, Hao Xu, T. Han, Mi Tian, Weiqiang Zhu, Zhijian Li, Na Yan

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引用次数: 0

摘要

本文介绍了一种利用消噪技术实现大带宽和低噪声系数的6-18GHz低噪声放大器的设计。LNA由三级组成，第一级采用阻性分流反馈级联编码拓扑，便于宽带输入阻抗匹配。第二和第三级分别用于降噪和增益补偿。采用感应峰值技术来拓宽带宽。采用130纳米CMOS PD-SOI技术实现的LNA在6-18GHz范围内实现最大增益15.44dB和最小NF 2.42dB，平坦度分别为±1.44dB和0.109dB/GHz，分数带宽高达100%。

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A 6-18GHz Low-Noise Amplifier Using Noise Canceling Technique in 130-nm CMOS PD-SOI

This paper presents the design of a 6-18GHz low-noise amplifier (LNA) utilizing noise canceling technique to achieve large bandwidth and low noise figure (NF) simultaneously. The LNA is composed of three stages, resistive shunt feedback cascode topology is adopted for the first one, which is convenient for wideband input impedance matching. Besides, the second and third stage are designed for noise canceling and gain compensation respectively. Inductive peaking technique is employed to broaden the bandwidth. Implemented in 130-nm CMOS PD-SOI technology, the proposed LNA achieves maximum 15.44dB gain and minimum 2.42dB NF with flatness of ±1.44dB and 0.109dB/GHz respectively across 6-18GHz, whose fractional bandwidth is as large as 100%.

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2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)

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