SAR ADC with DAC and SC Low-Pass Filter for Positron Emission Tomography Application

For positron emission tomography (PET), successive approximation register (SAR) analog-to-digital converter (ADC) and switched-capacitor (SC) low-pass filter implemented in tsmc 0.18-um CMOS process is presented. To reduce DAC switching energy and layout size, a hybrid resistor-capacitor DAC is applied. To save energy, asynchronous control logic to drive the ADC is used. A pre-amplifier based comparator circuit is built to reduce the kickback noise from the dynamic latch. The proposed filter uses cascades of first-order and second-order biquad seting blocks. In order to reach the largest possible input dynamic range, the method of dynamic range scaling and minimum capacitor scaling is used.