3.3-3.8GHz频段5G无线接收机前端

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI:10.1109/EDSSC.2019.8754123

Zhe-Yang Huang, Yen-Chun Wang

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引用次数: 1

摘要

本文提出了一种用于3.3GHz - 3.8GHz许可频段应用的5G无线接收机前端。前端采用0.35um BiCMOS工艺设计。仿真结果表明，该低噪声放大器的功率增益为23.1dB，噪声系数为2.5dB，输入回波损耗低于-20.7dB。混频器的转换增益为13.2dB，最大LO输入功率为-3dBm，三阶输入截距点为-8dBm。压控振荡器的调谐范围为3.48GHz-3.72GHz;相位噪声均低于-109.4dBc/Hz。包括所有缓冲器在内，该5G前端的总功耗为54.9mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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5G Wireless Receiver Front-End for 3.3-3.8GHz Frequency Band

This paper presents a 5G wireless receiver frontend for 3.3GHz – 3.8GHz licensed band application. The frontend designed in 0.35um BiCMOS process. Simulation results show the low-noise amplifier’s power gain is 23.1dB, noise figure is 2.5dB and input return loss is lower than -20.7dB. The conversion gain of the mixer is 13.2dB, max LO input power is -3dBm and the 3rd-order input intercept point is -8dBm. The tuning range of the voltage-controlled oscillator is from 3.48GHz-3.72GHz; and phase noise is all below -109.4dBc/Hz. Total power consumption of this 5G front-end is 54.9mW including all buffers.

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来源期刊

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

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