硅射频集成电路中螺旋电感衬底损耗建模

W. Kuhn, N. Yanduru
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引用次数: 54

摘要

由于串联电阻损耗和半导体衬底内的损耗,采用硅集成电路技术构建的螺旋电感具有有限的质量因素。对于不太了解的基板损耗的新模型说明了如何将这些损耗最小化,提供的质量因子比未优化的设计增加高达230%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Spiral inductor substrate loss modeling in silicon RF ICs
Spiral inductors constructed in silicon IC technologies possess limited quality factors due to series resistive losses, and losses within the semiconducting substrate. A new model for the less understood substrate losses illustrates how these losses can be minimized, providing quality factor increases of up to 230 percent over un-optimized designs.
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