{"title":"纳米级集成电路的三维多值设计","authors":"S. Lyshevski","doi":"10.1109/ISMVL.2005.49","DOIUrl":null,"url":null,"abstract":"Novel three-dimensional (3D) nanoscale integrated circuits (nanoICs) are examined in this paper. These nanoICs are synthesized utilizing aggregated 3D neuronal-hypercells (/spl aleph/-hypercells) with multi-terminal electronic nanodevices. The proposed nanodevices ensure multi-valued input-output characteristic that lead to a direct technological solution of multi-valued logic synthesis problem. Super-high-performance computing architectures and memories can be devised (synthesized), designed and optimized. At the system-level, we examine nanoICs as networked aggregated 3D /spl aleph/-hypercells. In particular, scalable 3D /spl aleph/-hypercell topologies are under consideration. These /spl aleph/-hypercells integrate interconnected functional multi-terminal electronic nanodevices that implement logic functions. The proposed nanoICs platform suits the envisioned cognizant computing ensuring preeminent information processing and immense memory.","PeriodicalId":340578,"journal":{"name":"35th International Symposium on Multiple-Valued Logic (ISMVL'05)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Three dimensional multi-valued design in nanoscale integrated circuits\",\"authors\":\"S. Lyshevski\",\"doi\":\"10.1109/ISMVL.2005.49\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Novel three-dimensional (3D) nanoscale integrated circuits (nanoICs) are examined in this paper. These nanoICs are synthesized utilizing aggregated 3D neuronal-hypercells (/spl aleph/-hypercells) with multi-terminal electronic nanodevices. The proposed nanodevices ensure multi-valued input-output characteristic that lead to a direct technological solution of multi-valued logic synthesis problem. Super-high-performance computing architectures and memories can be devised (synthesized), designed and optimized. At the system-level, we examine nanoICs as networked aggregated 3D /spl aleph/-hypercells. In particular, scalable 3D /spl aleph/-hypercell topologies are under consideration. These /spl aleph/-hypercells integrate interconnected functional multi-terminal electronic nanodevices that implement logic functions. The proposed nanoICs platform suits the envisioned cognizant computing ensuring preeminent information processing and immense memory.\",\"PeriodicalId\":340578,\"journal\":{\"name\":\"35th International Symposium on Multiple-Valued Logic (ISMVL'05)\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"35th International Symposium on Multiple-Valued Logic (ISMVL'05)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2005.49\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"35th International Symposium on Multiple-Valued Logic (ISMVL'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2005.49","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Three dimensional multi-valued design in nanoscale integrated circuits
Novel three-dimensional (3D) nanoscale integrated circuits (nanoICs) are examined in this paper. These nanoICs are synthesized utilizing aggregated 3D neuronal-hypercells (/spl aleph/-hypercells) with multi-terminal electronic nanodevices. The proposed nanodevices ensure multi-valued input-output characteristic that lead to a direct technological solution of multi-valued logic synthesis problem. Super-high-performance computing architectures and memories can be devised (synthesized), designed and optimized. At the system-level, we examine nanoICs as networked aggregated 3D /spl aleph/-hypercells. In particular, scalable 3D /spl aleph/-hypercell topologies are under consideration. These /spl aleph/-hypercells integrate interconnected functional multi-terminal electronic nanodevices that implement logic functions. The proposed nanoICs platform suits the envisioned cognizant computing ensuring preeminent information processing and immense memory.