带增益提升功能的 0.18μm CMOS 9mW 电流模式 FLF 线性相位滤波器

Xi Zhu, Yichuang Sun, J. Moritz
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引用次数: 10

摘要

本文介绍了 CMOS 连续时间跟踪反馈(FLF)滤波器的设计与实现。该滤波器采用基于源退化拓扑结构的全差分线性、低电压、低功耗运算跨导放大器(OTA)实现。使用标准 TSMC 0.18 微米 CMOS 工艺和 2 V 电源进行的 PSpice 仿真表明,滤波器的截止频率为 55 MHz 至 160 MHz,动态范围约为 45 dB。在整个调谐范围内,群延迟小于 5%;功耗仅为 9 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost
The design and implementation of a CMOS continuous-time follow-the-leader-feedback (FLF) filter is described. The filter is implemented using a fully-differential linear, low voltage and low power consumption operational transconductance amplifier (OTA) based on a source degeneration topology. PSpice simulations using a standard TSMC 0.18 mum CMOS process with 2 V power supply have shown that the cut-off frequency of the filter ranges from 55 MHz to 160 MHz and dynamic range is about 45 dB. The group delay is less than 5% over the whole tuning range; the power consumption is only 9 mW.
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