通过异或和多数逻辑合成解锁可控极性晶体管的机会

P. Gaillardon, L. Amarù, G. Micheli
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引用次数: 2

摘要

四十多年来,互补金属氧化物半导体(CMOS)场效应晶体管(fet)一直是实现数字计算系统的基础技术。CMOS晶体管本身实现非与(NAND)和非或(NOR)的逻辑运算符。如今,我们观察到一种趋势,即器件具有增加的逻辑能力,即与标准CMOS相比,能够以紧凑的方式实现特定的逻辑运算符。特别是,极性可控器件能够本地和紧凑地实现异或(XOR)和多数(MAJ)逻辑功能,并为未来的高性能计算系统打开了一个大的机会面板。然而,目前主要的逻辑综合工具利用NAND/NOR表示的算法,无法充分利用新颖的异或和主要面向技术的能力。在本文中,我们回顾了一些最近的工作,旨在提供新的逻辑综合技术,以本地评估异或算子和主要算子的逻辑能力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis
For more than four decades, Complementary Metal-Oxide-Semiconductor (CMOS) Field Effect Transistors (FETs) have been the baseline technology for implementing digital computation systems. CMOS transistors natively implement Not-AND (NAND)- and Not-OR (NOR)-based logic operators. Nowadays, we observe a trend towards devices with an increased set of logic capabilities, i.e., with the ability to realize in a compact way specific logic operators as compared to the standard CMOS. In particular, controllable-polarity devices enable a native and compact realization of eXclusive-OR (XOR)- and MAJority (MAJ)- logic functions, and open a large panel of opportunities for future high-performance computing systems. However, main current logic synthesis tools exploit algorithms using NAND/NOR representations that are not able to fully exploit the capabilities of novel XOR- and MAJ-oriented technologies. In this paper, we review some recent work that aims at providing novel logic synthesis techniques that natively assess the logic capabilities of XOR- and MAJ-operators.
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