{"title":"嵌入式图像处理系统快速原型设计的一种MP-SoC设计方法","authors":"L. Siéler, J. Derutin, A. Landrault","doi":"10.1109/SOCDC.2010.5682889","DOIUrl":null,"url":null,"abstract":"This article proposes an original design flow for the fast prototyping of image processing on a MP-SoC (MultiProcessors System on Chip) architecture. Developing processors network systems tailored to a particular application domain is critical and design-time consuming in order to achieve highperformance customized solutions. The effectiveness of such approaches largely depends on the availability of an ad hoc design methodology. This paper illustrates a new design flow that enables to instantiate a generic Homogeneous Network of Communicating Processors (called HNCP) tailored for a targeted application. The HNCP is generated with a tool that avoids fastidious manual editing operations for the designer. Specific lightweight communication functions have been developed to fasten the programming of the MP-SoC network. A case study (image texture analyzes) is presented to illustrate the proposed MP-SoC design methodology and enables to focus on architecture exploration, instantiated scheme of parallelization and timing performance.","PeriodicalId":380183,"journal":{"name":"2010 International SoC Design Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A MP-SoC design methodology for the fast prototyping of embedded image processing system\",\"authors\":\"L. Siéler, J. Derutin, A. Landrault\",\"doi\":\"10.1109/SOCDC.2010.5682889\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article proposes an original design flow for the fast prototyping of image processing on a MP-SoC (MultiProcessors System on Chip) architecture. Developing processors network systems tailored to a particular application domain is critical and design-time consuming in order to achieve highperformance customized solutions. The effectiveness of such approaches largely depends on the availability of an ad hoc design methodology. This paper illustrates a new design flow that enables to instantiate a generic Homogeneous Network of Communicating Processors (called HNCP) tailored for a targeted application. The HNCP is generated with a tool that avoids fastidious manual editing operations for the designer. Specific lightweight communication functions have been developed to fasten the programming of the MP-SoC network. A case study (image texture analyzes) is presented to illustrate the proposed MP-SoC design methodology and enables to focus on architecture exploration, instantiated scheme of parallelization and timing performance.\",\"PeriodicalId\":380183,\"journal\":{\"name\":\"2010 International SoC Design Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International SoC Design Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCDC.2010.5682889\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International SoC Design Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCDC.2010.5682889","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A MP-SoC design methodology for the fast prototyping of embedded image processing system
This article proposes an original design flow for the fast prototyping of image processing on a MP-SoC (MultiProcessors System on Chip) architecture. Developing processors network systems tailored to a particular application domain is critical and design-time consuming in order to achieve highperformance customized solutions. The effectiveness of such approaches largely depends on the availability of an ad hoc design methodology. This paper illustrates a new design flow that enables to instantiate a generic Homogeneous Network of Communicating Processors (called HNCP) tailored for a targeted application. The HNCP is generated with a tool that avoids fastidious manual editing operations for the designer. Specific lightweight communication functions have been developed to fasten the programming of the MP-SoC network. A case study (image texture analyzes) is presented to illustrate the proposed MP-SoC design methodology and enables to focus on architecture exploration, instantiated scheme of parallelization and timing performance.