6.3 0.9V双通道混叠滤波接收机前端，实现+35dBm IIP3和<-81dBm LO漏，支持带内和带间载波聚合

2021 IEEE International Solid- State Circuits Conference (ISSCC) Pub Date : 2021-02-13 DOI:10.1109/ISSCC42613.2021.9366017

Shi Bu, S. Pamarti

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引用次数: 1

摘要

近年来，可编程接收机受到了广泛的关注，特别是那些利用周期性时变电路的可编程接收机。n路滤波器和混频器优先接收器[1 - 3]实现了锐利的滤波和良好的线性，但可能遭受高LO泄漏(> -70 dBm)，这不符合FCC要求[4]。此外，它们不能很好地支持多载波操作[5]。

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6.3 A 0.9V Dual-Channel Filtering-by-Aliasing Receiver Front-End Achieving +35dBm IIP3 and <-81dBm LO Leakage Supporting Intra-and Inter-Band Carrier Aggregation

Programmable receivers have drawn a lot of attention in recent years, especially those exploiting periodically time-varying (PTV) circuits. N-path filters and mixer-first receivers [1– 3] achieve sharp filtering and good linearity but can suffer from high LO leakage (> -70 dBm), which is not compliant with the FCC requirements [4]. In addition, they do not support multi-carrier operation very well [5].

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2021 IEEE International Solid- State Circuits Conference (ISSCC)

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