采用SiGe BiCMOS技术的高线性低功率v波段下变频混频器

Z. Marvi, E. Ashoori
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引用次数: 0

摘要

本文提出了一种采用0.13um SiGe BiCMOS工艺实现的v波段吉尔伯特单元下变频混频器。混频器由双平衡吉尔伯特单元、用于RF和LO端口的片上变压器型平衡器以及匹配网络组成。对混频器的性能进行了优化,实现了高线性度、低噪声和低功耗。根据测量结果,在60 GHz频率下获得11dBm的1db输入压缩点,转换增益为-9.5 dB,总直流功耗为17.7 mW。在53 GHz时实现-6.5 dB的最大增益,LO驱动为-2 dBm时,3db RF带宽为50-60 GHz。如果3db带宽在5.5 GHz左右。芯片面积为483 μm × 482 μm。混频器的模拟噪声系数为9.5dB。该混频器的性能可与最先进的v波段混频器相媲美,具有高线性度和低功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Highly Linear Low Power V-Band Down-Conversion Mixer in SiGe BiCMOS Technology
This paper presents a V-band Gilbert-cell down-conversion mixer implemented in 0.13um SiGe BiCMOS process. The mixer consists of a double-balanced Gilbert-cell, on-chip transformer-type baluns for the RF and LO ports, and matching networks. The performance of the mixer is optimized to achieve high linearity, low noise and low power consumption. Based on the measurement results, 1-dB input compression point of 11dBm is obtained at 60 GHz with conversion gain of -9.5 dB with overall DC power consumption of 17.7 mW. The maximum gain of -6.5 dB is achieved at 53 GHz with 3-dB RF bandwidth of 50-60 GHz for LO drive of -2 dBm. IF 3-dB bandwidth is around 5.5 GHz. The chip occupies the area of 483 μm by 482 μm. The mixer has simulated noise figure of 9.5dB. The mixer achieves performance comparable to state-of-the-art V-band mixers with high linearity and low power consumption.
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