{"title":"用于单处理器和多处理器系统的硬件实时调度协处理器","authors":"Johan Stärner, J. Adomat, Johan Furunäs, L. Lindh","doi":"10.1109/EURMIC.1996.546476","DOIUrl":null,"url":null,"abstract":"Multiprocessor real-time systems are difficult to design to achieve predictable time behaviour. Our approach to simplification of the design and timing analysis is to use a scheduling coprocessor. We present the real-time services provided by the coprocessor as well as its implementation and timing. The scheduling coprocessor is a specially designed digital chip and is called the Real-Time Unit (RTU) with latency in the /spl mu/s domain.","PeriodicalId":311520,"journal":{"name":"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies","volume":"14 12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":"{\"title\":\"Real-time scheduling co-processor in hardware for single and multiprocessor systems\",\"authors\":\"Johan Stärner, J. Adomat, Johan Furunäs, L. Lindh\",\"doi\":\"10.1109/EURMIC.1996.546476\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multiprocessor real-time systems are difficult to design to achieve predictable time behaviour. Our approach to simplification of the design and timing analysis is to use a scheduling coprocessor. We present the real-time services provided by the coprocessor as well as its implementation and timing. The scheduling coprocessor is a specially designed digital chip and is called the Real-Time Unit (RTU) with latency in the /spl mu/s domain.\",\"PeriodicalId\":311520,\"journal\":{\"name\":\"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies\",\"volume\":\"14 12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-09-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"27\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EURMIC.1996.546476\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURMIC.1996.546476","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Real-time scheduling co-processor in hardware for single and multiprocessor systems
Multiprocessor real-time systems are difficult to design to achieve predictable time behaviour. Our approach to simplification of the design and timing analysis is to use a scheduling coprocessor. We present the real-time services provided by the coprocessor as well as its implementation and timing. The scheduling coprocessor is a specially designed digital chip and is called the Real-Time Unit (RTU) with latency in the /spl mu/s domain.