Prashanth R A, Adithya Rangan C K, A. Sreenivasan, Siddappa P Odeyar, V. Kulkarni, Aravinda K Holla
{"title":"数据率引擎为USB 2.0为基础的批量输入和输出事务","authors":"Prashanth R A, Adithya Rangan C K, A. Sreenivasan, Siddappa P Odeyar, V. Kulkarni, Aravinda K Holla","doi":"10.1109/ICAIT47043.2019.8987372","DOIUrl":null,"url":null,"abstract":"USB 2.0 is a serial communication protocol standard which connects peripherals like keyboards, mouse, cameras, audio devices like speakers and microphones, and other electronic devices like mass storage devices. Theoretically, USB 2.0 has defined a target of high speed data rate of 480Mbps, full speed data rate of 12Mbps and low speed data rate of 1.5Mbps. Hence, there arises a need to satisfy functional and speed requirements in the design and implementation of the USB 2.0 IP. This leads towards introducing a system that analyses the IP performance matching the protocol specifications. This paper depicts application of a data rate engine for bulk transfers of USB 2.0 protocol based transfers between host and device. The data rate engine consists of traffic analyzer, data rate calculator and performance tracker. The traffic analyzer recognizes different packets of the USB 2.0 transactions while keeping track of the data flow and related information. The data rate calculator acts as a plug-in to calculate the speed of transactions, additionally assisted by display unit to keep a record of obtained results. The performance tracker helps to understand the variation in data rate with respect to different factors affecting the IP performance. The implementation of data rate engine is in SystemVerilog in Linux platform and the corresponding behavior is identified through testcase simulations.","PeriodicalId":221994,"journal":{"name":"2019 1st International Conference on Advances in Information Technology (ICAIT)","volume":"248 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Data Rate Engine for USB 2.0 Based Bulk IN and OUT Transactions\",\"authors\":\"Prashanth R A, Adithya Rangan C K, A. Sreenivasan, Siddappa P Odeyar, V. Kulkarni, Aravinda K Holla\",\"doi\":\"10.1109/ICAIT47043.2019.8987372\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"USB 2.0 is a serial communication protocol standard which connects peripherals like keyboards, mouse, cameras, audio devices like speakers and microphones, and other electronic devices like mass storage devices. Theoretically, USB 2.0 has defined a target of high speed data rate of 480Mbps, full speed data rate of 12Mbps and low speed data rate of 1.5Mbps. Hence, there arises a need to satisfy functional and speed requirements in the design and implementation of the USB 2.0 IP. This leads towards introducing a system that analyses the IP performance matching the protocol specifications. This paper depicts application of a data rate engine for bulk transfers of USB 2.0 protocol based transfers between host and device. The data rate engine consists of traffic analyzer, data rate calculator and performance tracker. The traffic analyzer recognizes different packets of the USB 2.0 transactions while keeping track of the data flow and related information. The data rate calculator acts as a plug-in to calculate the speed of transactions, additionally assisted by display unit to keep a record of obtained results. The performance tracker helps to understand the variation in data rate with respect to different factors affecting the IP performance. The implementation of data rate engine is in SystemVerilog in Linux platform and the corresponding behavior is identified through testcase simulations.\",\"PeriodicalId\":221994,\"journal\":{\"name\":\"2019 1st International Conference on Advances in Information Technology (ICAIT)\",\"volume\":\"248 5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 1st International Conference on Advances in Information Technology (ICAIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICAIT47043.2019.8987372\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 1st International Conference on Advances in Information Technology (ICAIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAIT47043.2019.8987372","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
USB 2.0是一种串行通信协议标准,用于连接外围设备,如键盘、鼠标、相机、扬声器和麦克风等音频设备,以及其他电子设备,如大容量存储设备。理论上,USB 2.0定义了高速数据速率480Mbps、全速数据速率12Mbps和低速数据速率1.5Mbps的目标。因此,在设计和实现USB 2.0 IP时,需要满足功能和速度要求。这导致引入一个系统来分析与协议规范匹配的IP性能。本文描述了基于usb2.0协议的数据速率引擎在主机和设备之间批量传输的应用。数据速率引擎由流量分析器、数据速率计算器和性能跟踪器组成。流量分析器识别USB 2.0事务的不同数据包,同时跟踪数据流和相关信息。数据速率计算器作为一个插件来计算事务的速度,并辅以显示单元来记录所获得的结果。性能跟踪器有助于了解影响IP性能的不同因素对数据速率的影响。在Linux平台SystemVerilog中实现了数据速率引擎,并通过测试用例仿真确定了相应的行为。
Data Rate Engine for USB 2.0 Based Bulk IN and OUT Transactions
USB 2.0 is a serial communication protocol standard which connects peripherals like keyboards, mouse, cameras, audio devices like speakers and microphones, and other electronic devices like mass storage devices. Theoretically, USB 2.0 has defined a target of high speed data rate of 480Mbps, full speed data rate of 12Mbps and low speed data rate of 1.5Mbps. Hence, there arises a need to satisfy functional and speed requirements in the design and implementation of the USB 2.0 IP. This leads towards introducing a system that analyses the IP performance matching the protocol specifications. This paper depicts application of a data rate engine for bulk transfers of USB 2.0 protocol based transfers between host and device. The data rate engine consists of traffic analyzer, data rate calculator and performance tracker. The traffic analyzer recognizes different packets of the USB 2.0 transactions while keeping track of the data flow and related information. The data rate calculator acts as a plug-in to calculate the speed of transactions, additionally assisted by display unit to keep a record of obtained results. The performance tracker helps to understand the variation in data rate with respect to different factors affecting the IP performance. The implementation of data rate engine is in SystemVerilog in Linux platform and the corresponding behavior is identified through testcase simulations.