A full-rate software implementation of an IEEE 802.11a compliant digital baseband transmitter

A software based IEEE 802.11a digital baseband transmitter has been implemented on a highly parallel single-chip DSP. The processing platform is a programmable and reconfigurable asynchronous array of simple processors (AsAP) that is well matched to complex system workloads such as 802.11a. The transmitter is the first fully-compliant 802.11a software implementation, and is the first full-rate software implementation. The transmitter also complies with the high-rate portions of the 802.11g standard. It operates over all 8 data rates, includes additional upsampling and filtering functions, and sustains transmissions at 54 Mb/s on a 22-processor array; it is expected to occupy less than 20 mm/sup 2/ in 0.18 /spl mu/m CMOS.