提高产量的新路由和压实策略

Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems Pub Date : 1992-11-04 DOI:10.1109/DFTVS.1992.224342

V. Chiluvuri, I. Koren

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引用次数: 25

摘要

生产线的改进本身并不能弥补由于逻辑复杂性的增加而造成的产量损失。制造良率的提高需要在物理布局合成阶段本身解决。提出了几种提高成品率的布局策略，并对标准单元设计中的通道压缩和路由进行了说明。讨论了算法和其他实现问题，并给出了这些算法的示例。

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New routing and compaction strategies for yield enhancement

Improvements in manufacturing lines alone can not compensate for the yield losses due to the increase in complexity of logic. Manufacturing yield improvement needs to be addressed during the physical layout synthesis stage itself. Several layout strategies for yield enhancement are proposed and they are illustrated with respect to channel compaction and routing in standard cell design. Algorithms and other implementation issues are discussed and examples illustrating these algorithms are presented.<>

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Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

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