采用CCDDCCTA设计电压模式通用滤波器

2017 7th International Symposium on Embedded Computing and System Design (ISED) Pub Date : 2017-12-01 DOI:10.1109/ISED.2017.8303942

Rupam Das, Kaustav Mallick, Tunisha Tanvi, Kanishka Sah

{"title":"采用CCDDCCTA设计电压模式通用滤波器","authors":"Rupam Das, Kaustav Mallick, Tunisha Tanvi, Kanishka Sah","doi":"10.1109/ISED.2017.8303942","DOIUrl":null,"url":null,"abstract":"This article presents a voltage mode filter. This circuit has the following important features: It is designed using CCDDCCTA. All response like LP, HP, BP, AP, & notch are obtained without alteration of the configuration. Response of all filters is electronically tunable and Low sensitivity. Operation of proposed circuit is tested using 25µm CMOS process through PSPICE simulation. Simulated outputs match with the theoretical results.","PeriodicalId":147019,"journal":{"name":"2017 7th International Symposium on Embedded Computing and System Design (ISED)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Voltage mode universal filter design using CCDDCCTA\",\"authors\":\"Rupam Das, Kaustav Mallick, Tunisha Tanvi, Kanishka Sah\",\"doi\":\"10.1109/ISED.2017.8303942\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article presents a voltage mode filter. This circuit has the following important features: It is designed using CCDDCCTA. All response like LP, HP, BP, AP, & notch are obtained without alteration of the configuration. Response of all filters is electronically tunable and Low sensitivity. Operation of proposed circuit is tested using 25µm CMOS process through PSPICE simulation. Simulated outputs match with the theoretical results.\",\"PeriodicalId\":147019,\"journal\":{\"name\":\"2017 7th International Symposium on Embedded Computing and System Design (ISED)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 7th International Symposium on Embedded Computing and System Design (ISED)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISED.2017.8303942\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 7th International Symposium on Embedded Computing and System Design (ISED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISED.2017.8303942","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文介绍了一种电压型滤波器。该电路具有以下重要特点:采用CCDDCCTA设计。所有的响应，如LP, HP, BP, AP和notch，都可以在不改变配置的情况下获得。所有滤波器的响应都是电子可调的，灵敏度低。采用25µm CMOS工艺，通过PSPICE仿真测试了电路的运行情况。仿真结果与理论结果吻合。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Voltage mode universal filter design using CCDDCCTA

This article presents a voltage mode filter. This circuit has the following important features: It is designed using CCDDCCTA. All response like LP, HP, BP, AP, & notch are obtained without alteration of the configuration. Response of all filters is electronically tunable and Low sensitivity. Operation of proposed circuit is tested using 25µm CMOS process through PSPICE simulation. Simulated outputs match with the theoretical results.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2017 7th International Symposium on Embedded Computing and System Design (ISED)

自引率

0.00%

发文量