{"title":"用于电池管理的10 /spl mu/ v偏置8 kHz带宽4/sup /阶斩波/spl Sigma//spl Delta/ A/D转换器","authors":"P. Blanken, S. Menten","doi":"10.1109/ISSCC.2002.993095","DOIUrl":null,"url":null,"abstract":"A chopped 4/sup th-/order continuous-time 1 bit /spl Sigma//spl Delta/ A/D converter with 10 /spl mu/V offset and 8 kHz bandwidth has been designed for battery current measurement. Chopping at 16 kHz, the circuit has a 0.1 V input range, a 68 dB SNR, and a 1 MHz output bit rate. Area is 0.45x0.4 mm in 0.35 /spl mu/m CMOS. Current consumption is 30 /spl mu/A at 2.5-4 V.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 10 /spl mu/V-offset 8 kHz bandwidth 4/sup th/-order chopped /spl Sigma//spl Delta/ A/D converter for battery management\",\"authors\":\"P. Blanken, S. Menten\",\"doi\":\"10.1109/ISSCC.2002.993095\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A chopped 4/sup th-/order continuous-time 1 bit /spl Sigma//spl Delta/ A/D converter with 10 /spl mu/V offset and 8 kHz bandwidth has been designed for battery current measurement. Chopping at 16 kHz, the circuit has a 0.1 V input range, a 68 dB SNR, and a 1 MHz output bit rate. Area is 0.45x0.4 mm in 0.35 /spl mu/m CMOS. Current consumption is 30 /spl mu/A at 2.5-4 V.\",\"PeriodicalId\":423674,\"journal\":{\"name\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2002.993095\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.993095","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10 /spl mu/V-offset 8 kHz bandwidth 4/sup th/-order chopped /spl Sigma//spl Delta/ A/D converter for battery management
A chopped 4/sup th-/order continuous-time 1 bit /spl Sigma//spl Delta/ A/D converter with 10 /spl mu/V offset and 8 kHz bandwidth has been designed for battery current measurement. Chopping at 16 kHz, the circuit has a 0.1 V input range, a 68 dB SNR, and a 1 MHz output bit rate. Area is 0.45x0.4 mm in 0.35 /spl mu/m CMOS. Current consumption is 30 /spl mu/A at 2.5-4 V.