{"title":"SOI在高温运行中的优势论证","authors":"W. Krull, J.C. Lee","doi":"10.1109/SOI.1988.95439","DOIUrl":null,"url":null,"abstract":"Summary form only given. To evaluate the performance of SOI circuits at high temperatures, CMOS 4K SRAMs were fabricated on SIMOX (separation by implantation of oxygen) and bulk starting material. Four varieties were included in this study: bulk (5 mu m epi on n/sup +/), and SIMOX/SOI with three silicon-layer thicknesses (0.5 mu m, 0.75 mu m, and 1.0 mu m). This combination allows the assessment of three device structures: standard bulk devices, standard SOI devices (S/D contacting the buried oxide), and semi-bulk SOI devices which operate like bulk devices but are dielectrically isolated. All the SOI SRAMs were functional to the maximum temperature available, 300 degrees C. The bulk circuits also functioned at elevated temperatures, but lost functionality between 250 degrees C and 275 degrees C due to the rapidly increasing leakage current associated with the well junction. The synchronous access time increased approximately linearly with temperature for all devices, and was nearly twice the measured room-temperature value at 300 degrees C. Leakage current increased strongly with temperature for all devices, with the thin SOI devices having the least static current at the highest temperatures.<<ETX>>","PeriodicalId":391934,"journal":{"name":"Proceedings. SOS/SOI Technology Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"Demonstration of the benefits of SOI for high temperature operation\",\"authors\":\"W. Krull, J.C. Lee\",\"doi\":\"10.1109/SOI.1988.95439\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. To evaluate the performance of SOI circuits at high temperatures, CMOS 4K SRAMs were fabricated on SIMOX (separation by implantation of oxygen) and bulk starting material. Four varieties were included in this study: bulk (5 mu m epi on n/sup +/), and SIMOX/SOI with three silicon-layer thicknesses (0.5 mu m, 0.75 mu m, and 1.0 mu m). This combination allows the assessment of three device structures: standard bulk devices, standard SOI devices (S/D contacting the buried oxide), and semi-bulk SOI devices which operate like bulk devices but are dielectrically isolated. All the SOI SRAMs were functional to the maximum temperature available, 300 degrees C. The bulk circuits also functioned at elevated temperatures, but lost functionality between 250 degrees C and 275 degrees C due to the rapidly increasing leakage current associated with the well junction. The synchronous access time increased approximately linearly with temperature for all devices, and was nearly twice the measured room-temperature value at 300 degrees C. Leakage current increased strongly with temperature for all devices, with the thin SOI devices having the least static current at the highest temperatures.<<ETX>>\",\"PeriodicalId\":391934,\"journal\":{\"name\":\"Proceedings. SOS/SOI Technology Workshop\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. SOS/SOI Technology Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.1988.95439\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SOS/SOI Technology Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1988.95439","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
摘要
只提供摘要形式。为了评估SOI电路在高温下的性能,采用SIMOX(氧注入分离)和块状起始材料制备了CMOS 4K sram。本研究包括四种品种:块状(n/sup +/上5 μ m epi)和SIMOX/SOI,具有三种硅层厚度(0.5 μ m, 0.75 μ m和1.0 μ m)。这种组合可以评估三种器件结构:标准块状器件,标准SOI器件(S/D与埋地氧化物接触),半块状SOI器件与块状器件一样工作,但介质隔离。所有SOI sram都能在最高可用温度300℃下工作,整体电路也能在高温下工作,但在250℃至275℃之间,由于与井结相关的泄漏电流迅速增加而失去功能。所有器件的同步存取时间都随温度近似线性增加,在300℃时几乎是室温测量值的两倍。所有器件的泄漏电流都随温度的升高而强烈增加,在最高温度下,薄SOI器件的静态电流最小。
Demonstration of the benefits of SOI for high temperature operation
Summary form only given. To evaluate the performance of SOI circuits at high temperatures, CMOS 4K SRAMs were fabricated on SIMOX (separation by implantation of oxygen) and bulk starting material. Four varieties were included in this study: bulk (5 mu m epi on n/sup +/), and SIMOX/SOI with three silicon-layer thicknesses (0.5 mu m, 0.75 mu m, and 1.0 mu m). This combination allows the assessment of three device structures: standard bulk devices, standard SOI devices (S/D contacting the buried oxide), and semi-bulk SOI devices which operate like bulk devices but are dielectrically isolated. All the SOI SRAMs were functional to the maximum temperature available, 300 degrees C. The bulk circuits also functioned at elevated temperatures, but lost functionality between 250 degrees C and 275 degrees C due to the rapidly increasing leakage current associated with the well junction. The synchronous access time increased approximately linearly with temperature for all devices, and was nearly twice the measured room-temperature value at 300 degrees C. Leakage current increased strongly with temperature for all devices, with the thin SOI devices having the least static current at the highest temperatures.<>