{"title":"ISA真的重要吗?基于仿真的调查","authors":"Ming Ling, Xin Xu, Y. Gu, Zhihua Pan","doi":"10.1109/PACRIM47961.2019.8985059","DOIUrl":null,"url":null,"abstract":"Prior studies on the performance and energy impacts of ISAs are normally based on the measurements of real hardware platforms. However, the extremely diverse hardware implementations make the comparisons among different platforms difficult and indirect, not mention the difficulties of the analyses of micro-architectural metrics. In this paper, we conduct an investigation of ARM, RISC-V and X86 ISAs based on the gem5 cycle-accurate simulations, in which the target implementations of these ISAs are simulated with the same three hardware configurations, namely the In-Order, Out-of-Order1 and Out-of-Order2. Fifteen benchmarks chosen from SPEC2006 and BEEBS are used to conduct the simulations. Meanwhile, the power and energy consumption of the target implementations is evaluated by McPAT. Our simulation results suggest that although ARM ISA outperforms RISC-V and X86 ISAs in performance and energy consumption, the differences between ARM and RISC-V are very subtle, while the performance gaps between ARM and X86 are possibly caused by the relatively low hardware configurations used in this paper and could be narrowed or even reversed by more aggressive hardware approaches. Our study confirms that one ISA is not fundamentally more efficient.","PeriodicalId":152556,"journal":{"name":"2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Does the ISA Really Matter? A Simulation Based Investigation\",\"authors\":\"Ming Ling, Xin Xu, Y. Gu, Zhihua Pan\",\"doi\":\"10.1109/PACRIM47961.2019.8985059\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Prior studies on the performance and energy impacts of ISAs are normally based on the measurements of real hardware platforms. However, the extremely diverse hardware implementations make the comparisons among different platforms difficult and indirect, not mention the difficulties of the analyses of micro-architectural metrics. In this paper, we conduct an investigation of ARM, RISC-V and X86 ISAs based on the gem5 cycle-accurate simulations, in which the target implementations of these ISAs are simulated with the same three hardware configurations, namely the In-Order, Out-of-Order1 and Out-of-Order2. Fifteen benchmarks chosen from SPEC2006 and BEEBS are used to conduct the simulations. Meanwhile, the power and energy consumption of the target implementations is evaluated by McPAT. Our simulation results suggest that although ARM ISA outperforms RISC-V and X86 ISAs in performance and energy consumption, the differences between ARM and RISC-V are very subtle, while the performance gaps between ARM and X86 are possibly caused by the relatively low hardware configurations used in this paper and could be narrowed or even reversed by more aggressive hardware approaches. Our study confirms that one ISA is not fundamentally more efficient.\",\"PeriodicalId\":152556,\"journal\":{\"name\":\"2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PACRIM47961.2019.8985059\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PACRIM47961.2019.8985059","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Does the ISA Really Matter? A Simulation Based Investigation
Prior studies on the performance and energy impacts of ISAs are normally based on the measurements of real hardware platforms. However, the extremely diverse hardware implementations make the comparisons among different platforms difficult and indirect, not mention the difficulties of the analyses of micro-architectural metrics. In this paper, we conduct an investigation of ARM, RISC-V and X86 ISAs based on the gem5 cycle-accurate simulations, in which the target implementations of these ISAs are simulated with the same three hardware configurations, namely the In-Order, Out-of-Order1 and Out-of-Order2. Fifteen benchmarks chosen from SPEC2006 and BEEBS are used to conduct the simulations. Meanwhile, the power and energy consumption of the target implementations is evaluated by McPAT. Our simulation results suggest that although ARM ISA outperforms RISC-V and X86 ISAs in performance and energy consumption, the differences between ARM and RISC-V are very subtle, while the performance gaps between ARM and X86 are possibly caused by the relatively low hardware configurations used in this paper and could be narrowed or even reversed by more aggressive hardware approaches. Our study confirms that one ISA is not fundamentally more efficient.