L. M. Gevrekci, Mehmet Umut Demircin, Erdem Akagündüz
{"title":"实时图像配准","authors":"L. M. Gevrekci, Mehmet Umut Demircin, Erdem Akagündüz","doi":"10.1109/SIU.2012.6204585","DOIUrl":null,"url":null,"abstract":"This paper summarizes the developed real-time algorithm for registering subsequent video frames and experiments performed on an embedded processor. The features extracted from subsequent frames are matched using a RANSAC technique and frames are registered with an affine transformation model. The techniques used in the literature are improved to work in real-time and a system that can register 320×240 resolution images at approximately 40 frames per second is developed. Experiments are performed on a BeagleBoard-XM single board computer that contains ARM and DSP processor cores.","PeriodicalId":256154,"journal":{"name":"2012 20th Signal Processing and Communications Applications Conference (SIU)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Real-time image registration\",\"authors\":\"L. M. Gevrekci, Mehmet Umut Demircin, Erdem Akagündüz\",\"doi\":\"10.1109/SIU.2012.6204585\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper summarizes the developed real-time algorithm for registering subsequent video frames and experiments performed on an embedded processor. The features extracted from subsequent frames are matched using a RANSAC technique and frames are registered with an affine transformation model. The techniques used in the literature are improved to work in real-time and a system that can register 320×240 resolution images at approximately 40 frames per second is developed. Experiments are performed on a BeagleBoard-XM single board computer that contains ARM and DSP processor cores.\",\"PeriodicalId\":256154,\"journal\":{\"name\":\"2012 20th Signal Processing and Communications Applications Conference (SIU)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 20th Signal Processing and Communications Applications Conference (SIU)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIU.2012.6204585\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 20th Signal Processing and Communications Applications Conference (SIU)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIU.2012.6204585","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper summarizes the developed real-time algorithm for registering subsequent video frames and experiments performed on an embedded processor. The features extracted from subsequent frames are matched using a RANSAC technique and frames are registered with an affine transformation model. The techniques used in the literature are improved to work in real-time and a system that can register 320×240 resolution images at approximately 40 frames per second is developed. Experiments are performed on a BeagleBoard-XM single board computer that contains ARM and DSP processor cores.
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