{"title":"3DMemory -内存使用分析工具","authors":"A. Schönberger, K. Hofmann","doi":"10.1109/MECO.2014.6862663","DOIUrl":null,"url":null,"abstract":"Die-stacking technology is opening up new options for memory system design. Through silicon vias (TSV) provide a configurable interface between memory and processing unit and allow a high bandwidth. System performance can be increased significantly by a sophisticated DRAM architecture design. This paper presents a framework providing a design recommendation for memory based on application execution data. The analysis approach can be adapted for different system configurations and applications. In this work a single-core execution of JPEG2000 algorithm for different picture sizes is analyzed with the tool.","PeriodicalId":416168,"journal":{"name":"2014 3rd Mediterranean Conference on Embedded Computing (MECO)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"3DMemory — Memory usage analysis tool\",\"authors\":\"A. Schönberger, K. Hofmann\",\"doi\":\"10.1109/MECO.2014.6862663\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Die-stacking technology is opening up new options for memory system design. Through silicon vias (TSV) provide a configurable interface between memory and processing unit and allow a high bandwidth. System performance can be increased significantly by a sophisticated DRAM architecture design. This paper presents a framework providing a design recommendation for memory based on application execution data. The analysis approach can be adapted for different system configurations and applications. In this work a single-core execution of JPEG2000 algorithm for different picture sizes is analyzed with the tool.\",\"PeriodicalId\":416168,\"journal\":{\"name\":\"2014 3rd Mediterranean Conference on Embedded Computing (MECO)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 3rd Mediterranean Conference on Embedded Computing (MECO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MECO.2014.6862663\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 3rd Mediterranean Conference on Embedded Computing (MECO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MECO.2014.6862663","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Die-stacking technology is opening up new options for memory system design. Through silicon vias (TSV) provide a configurable interface between memory and processing unit and allow a high bandwidth. System performance can be increased significantly by a sophisticated DRAM architecture design. This paper presents a framework providing a design recommendation for memory based on application execution data. The analysis approach can be adapted for different system configurations and applications. In this work a single-core execution of JPEG2000 algorithm for different picture sizes is analyzed with the tool.
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