基于微处理器的系统设计中的容错和自检技术

P. Lala
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引用次数: 4

摘要

为了防止数字系统在关键应用中出现误操作,容错设计受到了广泛的关注。现在市面上有许多具有硬件容错功能的多处理器系统。本文概述了迄今为止在应用容错技术来提高基于微处理器的系统的可靠性和可用性方面所做的一些工作。提高系统可靠性的另一种方法是应用自检技术,主要是通过使用错误检测代码。通过将容错和自检技术相结合,可以显著提高微处理器系统的可靠性和可维护性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fault tolerance and self-checking techniques in microprocessor-based system design
Fault tolerant design is receiving considerable attention at present in order to safeguard against improper operation of digital systems in critical applications. A number of multiprocessor systems featuring hardware fault tolerance are now available commercially. The paper presents an overview of some of the work done so far in the application of fault tolerance techniques to improve the reliability and availability of microprocessor-based systems. An alternative approach to enhance the reliability of a system is to apply self-checking techniques, primarily through the use of error detecting codes. By merging the fault tolerance and the self-checking techniques, the reliability and the maintainability of microprocessor-based systems can be significantly improved.
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