S. Kundu, S. Karmakar, G. S. Taki, Aishwarya Roy, C. Choudhuri, Megha Basu, Ankan Basak, R. Upadhyay, Abhinav Raj, S. Mandal
{"title":"亚微米器件技术的进展","authors":"S. Kundu, S. Karmakar, G. S. Taki, Aishwarya Roy, C. Choudhuri, Megha Basu, Ankan Basak, R. Upadhyay, Abhinav Raj, S. Mandal","doi":"10.1109/IEMECON.2017.8079614","DOIUrl":null,"url":null,"abstract":"Scaling of Metal Oxide Semiconductor (MOS) devices under submicron range experiences high device power dissipation due to large leakage current caused by Short Channel Effects (SCE). The use of high-K dielectric gate stack in MOS technology can solve these problems. The structure of the MOS device appears to be a vital issue below 22nm technology. The technologist devised FinFET, Tunnel FET (TFET), Carbon Nano Tube based TFET (T-CNFET), Nanowire-FET (NWFET) to remove the drawbacks of the existing technology. The various features of such devices have been discussed in this article.","PeriodicalId":231330,"journal":{"name":"2017 8th Annual Industrial Automation and Electromechanical Engineering Conference (IEMECON)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Progress in submicron device technology\",\"authors\":\"S. Kundu, S. Karmakar, G. S. Taki, Aishwarya Roy, C. Choudhuri, Megha Basu, Ankan Basak, R. Upadhyay, Abhinav Raj, S. Mandal\",\"doi\":\"10.1109/IEMECON.2017.8079614\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Scaling of Metal Oxide Semiconductor (MOS) devices under submicron range experiences high device power dissipation due to large leakage current caused by Short Channel Effects (SCE). The use of high-K dielectric gate stack in MOS technology can solve these problems. The structure of the MOS device appears to be a vital issue below 22nm technology. The technologist devised FinFET, Tunnel FET (TFET), Carbon Nano Tube based TFET (T-CNFET), Nanowire-FET (NWFET) to remove the drawbacks of the existing technology. The various features of such devices have been discussed in this article.\",\"PeriodicalId\":231330,\"journal\":{\"name\":\"2017 8th Annual Industrial Automation and Electromechanical Engineering Conference (IEMECON)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 8th Annual Industrial Automation and Electromechanical Engineering Conference (IEMECON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMECON.2017.8079614\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 8th Annual Industrial Automation and Electromechanical Engineering Conference (IEMECON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMECON.2017.8079614","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scaling of Metal Oxide Semiconductor (MOS) devices under submicron range experiences high device power dissipation due to large leakage current caused by Short Channel Effects (SCE). The use of high-K dielectric gate stack in MOS technology can solve these problems. The structure of the MOS device appears to be a vital issue below 22nm technology. The technologist devised FinFET, Tunnel FET (TFET), Carbon Nano Tube based TFET (T-CNFET), Nanowire-FET (NWFET) to remove the drawbacks of the existing technology. The various features of such devices have been discussed in this article.