亚微米器件技术的进展

S. Kundu, S. Karmakar, G. S. Taki, Aishwarya Roy, C. Choudhuri, Megha Basu, Ankan Basak, R. Upadhyay, Abhinav Raj, S. Mandal
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引用次数: 3

摘要

金属氧化物半导体(MOS)器件在亚微米尺度下的缩放,由于短通道效应(SCE)导致的大泄漏电流,导致器件功耗高。在MOS技术中采用高介电常数栅极叠加可以解决这些问题。在22nm技术下,MOS器件的结构似乎是一个至关重要的问题。该技术人员设计了FinFET,隧道FET (TFET),基于碳纳米管的FET (T-CNFET),纳米线FET (NWFET),以消除现有技术的缺点。本文讨论了这种装置的各种特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Progress in submicron device technology
Scaling of Metal Oxide Semiconductor (MOS) devices under submicron range experiences high device power dissipation due to large leakage current caused by Short Channel Effects (SCE). The use of high-K dielectric gate stack in MOS technology can solve these problems. The structure of the MOS device appears to be a vital issue below 22nm technology. The technologist devised FinFET, Tunnel FET (TFET), Carbon Nano Tube based TFET (T-CNFET), Nanowire-FET (NWFET) to remove the drawbacks of the existing technology. The various features of such devices have been discussed in this article.
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