H. Fujii, S. Tokumitsu, T. Mori, T. Yamashita, T. Maruyama, T. Maruyama, Y. Maruyama, Shigeki Nishimoto, Hiroyuki Arie, Shunji Kubo, T. Ipposhi
{"title":"90nm大块BiCDMOS平台技术,15-80V ld - mosfet,适用于汽车应用","authors":"H. Fujii, S. Tokumitsu, T. Mori, T. Yamashita, T. Maruyama, T. Maruyama, Y. Maruyama, Shigeki Nishimoto, Hiroyuki Arie, Shunji Kubo, T. Ipposhi","doi":"10.23919/ISPSD.2017.7988896","DOIUrl":null,"url":null,"abstract":"This paper proposes a 90nm bulk BiCDMOS platform for automotive applications. In this platform, two types of characteristic deep trench isolations are introduced. One has a top-to-bottom air-gap which serves as a stable isolator against high voltage. Another has a tungsten plug which not only minimizes area and resistance for substrate grounding but also slims down a noise-blocking active barrier guard-ring. For an Neh LD-MOSFET, a resurf-enforcing p-type region is inserted to cancel the electric field intensification brought by little thermal treatment. The advanced 90nm rule is mainly applied to a logic area for chip-size reduction. This platform also provides analog-friendly devices such as HV BJTs, full-isolation diode and eFlash.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"1799 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A 90nm bulk BiCDMOS platform technology with 15–80V LD-MOSFETs for automotive applications\",\"authors\":\"H. Fujii, S. Tokumitsu, T. Mori, T. Yamashita, T. Maruyama, T. Maruyama, Y. Maruyama, Shigeki Nishimoto, Hiroyuki Arie, Shunji Kubo, T. Ipposhi\",\"doi\":\"10.23919/ISPSD.2017.7988896\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a 90nm bulk BiCDMOS platform for automotive applications. In this platform, two types of characteristic deep trench isolations are introduced. One has a top-to-bottom air-gap which serves as a stable isolator against high voltage. Another has a tungsten plug which not only minimizes area and resistance for substrate grounding but also slims down a noise-blocking active barrier guard-ring. For an Neh LD-MOSFET, a resurf-enforcing p-type region is inserted to cancel the electric field intensification brought by little thermal treatment. The advanced 90nm rule is mainly applied to a logic area for chip-size reduction. This platform also provides analog-friendly devices such as HV BJTs, full-isolation diode and eFlash.\",\"PeriodicalId\":202561,\"journal\":{\"name\":\"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)\",\"volume\":\"1799 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/ISPSD.2017.7988896\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ISPSD.2017.7988896","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 90nm bulk BiCDMOS platform technology with 15–80V LD-MOSFETs for automotive applications
This paper proposes a 90nm bulk BiCDMOS platform for automotive applications. In this platform, two types of characteristic deep trench isolations are introduced. One has a top-to-bottom air-gap which serves as a stable isolator against high voltage. Another has a tungsten plug which not only minimizes area and resistance for substrate grounding but also slims down a noise-blocking active barrier guard-ring. For an Neh LD-MOSFET, a resurf-enforcing p-type region is inserted to cancel the electric field intensification brought by little thermal treatment. The advanced 90nm rule is mainly applied to a logic area for chip-size reduction. This platform also provides analog-friendly devices such as HV BJTs, full-isolation diode and eFlash.