用于便携式工作站的RISC微处理器的ASIC实现

1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings Pub Date : 1995-11-06 DOI:10.1109/TENCON.1995.496446

Seung Ho Lee, B. Y. Choi, M. Lee

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引用次数: 0

摘要

本文介绍了一种基于HDL的便携式工作站用RISC微处理器的设计，该设计对性价比和集成度要求很高。该芯片基于0.6 /spl mu/m TLM CMOS技术，包含IU、MMU/CC、总线控制器和地址转换存储器，芯片尺寸为1.1 cm/sup 2/片，工作频率为45 MHz。采用基于标准单元的设计方法和伪系统建模，可以实现快速的设计时间和易于实现的全功能验证。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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ASIC implementation of a RISC microprocessor for portable workstation

This paper describes the HDL based design of a RISC microprocessor for portable workstation which especially requires both cost effectiveness and highly integrated functions. Based on 0.6 /spl mu/m TLM CMOS technology, this chip includes IU, MMU/CC, bus controller, and address translation memory in a 1.1 cm/sup 2/ die size, and operates at 45 MHz. Both fast design time and the easiness of full functional verification could be feasible with standard cell based design methodology and pseudo system modelling.

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来源期刊

1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings

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