{"title":"PCB通过现场嵌入螺距变换为ATE弹簧脚块","authors":"J. Moreira, H. Barnes, V. Poisson","doi":"10.1109/SAPIW.2015.7237395","DOIUrl":null,"url":null,"abstract":"This paper presents a comparison of two different printed circuit board (PCB) via field designs for high density ATE pogo pin interconnects running at Gb/s data rates. The first design is a simple straight through, one-for-one, pogo pin to via design while the second is a higher performance via design that does a transformation of the pogo pin pitch. The higher performance design takes the non-uniform signal/ground pin map of the high density pogo block and translates it to a uniform signal-ground-signal topology to increase the useable bandwidth.","PeriodicalId":231437,"journal":{"name":"2015 IEEE 19th Workshop on Signal and Power Integrity (SPI)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"PCB via field with embedded pitch transformation for ATE pogo pin blocks\",\"authors\":\"J. Moreira, H. Barnes, V. Poisson\",\"doi\":\"10.1109/SAPIW.2015.7237395\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a comparison of two different printed circuit board (PCB) via field designs for high density ATE pogo pin interconnects running at Gb/s data rates. The first design is a simple straight through, one-for-one, pogo pin to via design while the second is a higher performance via design that does a transformation of the pogo pin pitch. The higher performance design takes the non-uniform signal/ground pin map of the high density pogo block and translates it to a uniform signal-ground-signal topology to increase the useable bandwidth.\",\"PeriodicalId\":231437,\"journal\":{\"name\":\"2015 IEEE 19th Workshop on Signal and Power Integrity (SPI)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 19th Workshop on Signal and Power Integrity (SPI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SAPIW.2015.7237395\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 19th Workshop on Signal and Power Integrity (SPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SAPIW.2015.7237395","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
PCB via field with embedded pitch transformation for ATE pogo pin blocks
This paper presents a comparison of two different printed circuit board (PCB) via field designs for high density ATE pogo pin interconnects running at Gb/s data rates. The first design is a simple straight through, one-for-one, pogo pin to via design while the second is a higher performance via design that does a transformation of the pogo pin pitch. The higher performance design takes the non-uniform signal/ground pin map of the high density pogo block and translates it to a uniform signal-ground-signal topology to increase the useable bandwidth.
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