基于可靠性增强测试仿真的系统级封装漏洞分析

Jiaoying Huang, Yang Cao, Cheng Gao
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引用次数: 0

摘要

系统级封装(System-in-Package, SiP)广泛应用于电子系统中,电子系统结构复杂,材料多变,可靠性存在不确定性。本文对SiP设备常见的故障原因进行了介绍和分析。为了找出SiP设备的弱点,利用ANSYS Workbench通过RET (Reliability Enhancement Testing,可靠性增强测试)仿真实现了漏洞分析。在热应力条件下,对由元器件和互连构成的SiP器件进行了评价。结果表明,焊点和引脚是SiP器件的薄弱环节。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Vulnerability Analysis of System-in-Package Based on Reliability Enhancement Testing Simulation
SiP (System-in-Package) is widely applied in electronic systems, whose complex structure and variable materials result in uncertainty of reliability. In this study, the common failure reasons of SiP devices are introduced and analyzed. In order to find out the weakness of SiP devices, vulnerability analysis is implemented by RET (Reliability Enhancement Testing) simulation with ANSYS Workbench. The SiP device made of components and interconnections is evaluated in the condition of thermal stress. The results show that solder joints and pins are the weaknesses of the SiP device.
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