Bruno Vilić Belina, Renato Babojelic, Š. Ileš, J. Matuško
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Analysis of FPGA Implementation of Set-based Predictive Control for Grid-tied Inverters
This paper analyses an field-programmable gate array (FPGA) implementation of a set-based model predictive control algorithm for controlling a grid-tied inverter with an LCL filter. Parallelizing the MPC algorithm in FPGA hardware led to substantial decrease in computation time. The implementation is show to be synthesizeable on a commercial mid-range FPGA device.