利用栅极漏极与异质结的重叠结构改善TFET的性能

K. Kavi, Abhishek Devedi, R. Mishra
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引用次数: 0

摘要

比较分析了硅源DMDG-TFET和锗源形成异质结的DMDG-GDOV TFET的性能。报道了利用栅极漏极与Ge源形成的异质结重叠对晶体管漏极电流(ID)、亚阈值摆幅(SS)、电流开关比(ION/IOFF)、双极电流、电容、跨导和本征延迟等性能参数的影响。栅极-漏极重叠有助于改善器件的双极行为,因为双极区域的电场减小了。此外,硅锗异质结的影响减小了隧道势垒宽度,从而提高了器件的导通电流。这也提高了TFET器件的跨导性和开关速度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performace Improvement of TFET using Gate drain overlap structure with hetrojunction
This paper compares and analyzes the performance of DMDG-TFET and DMDG-GDOV TFET with Si source and with heterojunction formed by Ge Source. It reports the influence of using gate drain overlap with heterojunction formed by Ge source on the performance parameters such as drain current(ID), subthreshold swing(SS), current switching ratio(ION/IOFF), am- bipolar current, capacitance, transconductance and intrinsic delay of the TFET device. The gate-drain overlap helps in improving the ambipolar behavior of the device as the electric field in the ambipolar region is reduced. Further the influence of Silicon-Germanium heterojunction reduces the tunneling barrier width which results in the improved-ON current of the proposed device. This also improves the transconductance and switching speed of the TFET device.
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