{"title":"JIGSAW中大规模并行VLSI掩模验证新算法的设计与性能评价","authors":"E. Carlson, Rob A. Rutenbar","doi":"10.1145/123186.123268","DOIUrl":null,"url":null,"abstract":"The massively parallel mask checking system JIGSAW is described. It has evolved from the authors' earlier feasibility study on large-scale, fine-grain parallelism in simple mask checking tasks (Proc. 24th DAC, 1988). Unlike previous systems, JIGSAW parallelizes all phases of the checking process. Described are new techniques to handle all-angle geometry, the first massively parallel mask flattening and multilayer netlist extraction algorithms, and measurements made comparing JIGSAW, running on a Connection Machine, against industry-standard tools. End-to-end speedups (i.e., from CIF to errors) range from 19 to 58 over DRACULA with larger masks producing larger speedups.<<ETX>>","PeriodicalId":118552,"journal":{"name":"27th ACM/IEEE Design Automation Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Design and performance evaluation of new massively parallel VLSI mask verification algorithms in JIGSAW\",\"authors\":\"E. Carlson, Rob A. Rutenbar\",\"doi\":\"10.1145/123186.123268\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The massively parallel mask checking system JIGSAW is described. It has evolved from the authors' earlier feasibility study on large-scale, fine-grain parallelism in simple mask checking tasks (Proc. 24th DAC, 1988). Unlike previous systems, JIGSAW parallelizes all phases of the checking process. Described are new techniques to handle all-angle geometry, the first massively parallel mask flattening and multilayer netlist extraction algorithms, and measurements made comparing JIGSAW, running on a Connection Machine, against industry-standard tools. End-to-end speedups (i.e., from CIF to errors) range from 19 to 58 over DRACULA with larger masks producing larger speedups.<<ETX>>\",\"PeriodicalId\":118552,\"journal\":{\"name\":\"27th ACM/IEEE Design Automation Conference\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"27th ACM/IEEE Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/123186.123268\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th ACM/IEEE Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/123186.123268","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and performance evaluation of new massively parallel VLSI mask verification algorithms in JIGSAW
The massively parallel mask checking system JIGSAW is described. It has evolved from the authors' earlier feasibility study on large-scale, fine-grain parallelism in simple mask checking tasks (Proc. 24th DAC, 1988). Unlike previous systems, JIGSAW parallelizes all phases of the checking process. Described are new techniques to handle all-angle geometry, the first massively parallel mask flattening and multilayer netlist extraction algorithms, and measurements made comparing JIGSAW, running on a Connection Machine, against industry-standard tools. End-to-end speedups (i.e., from CIF to errors) range from 19 to 58 over DRACULA with larger masks producing larger speedups.<>