Bo Yao, I. Pomeranz, S. Venkataraman, M. E. Amyeen
{"title":"考虑主要输入约束的内置功能侧测试生成","authors":"Bo Yao, I. Pomeranz, S. Venkataraman, M. E. Amyeen","doi":"10.1145/2591513.2591560","DOIUrl":null,"url":null,"abstract":"This paper describes a method for built-in generation of functional broadside tests for a circuit that is embedded in a larger design, taking functional constraints on its primary input sequences into account. The constraints are captured by functional input sequences of the design. Specifically, the peak switching activity in the circuit under the functional input sequences is used to bound the switching activity during on-chip test generation.","PeriodicalId":272619,"journal":{"name":"ACM Great Lakes Symposium on VLSI","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Built-in generation of functional broadside tests considering primary input constraints\",\"authors\":\"Bo Yao, I. Pomeranz, S. Venkataraman, M. E. Amyeen\",\"doi\":\"10.1145/2591513.2591560\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a method for built-in generation of functional broadside tests for a circuit that is embedded in a larger design, taking functional constraints on its primary input sequences into account. The constraints are captured by functional input sequences of the design. Specifically, the peak switching activity in the circuit under the functional input sequences is used to bound the switching activity during on-chip test generation.\",\"PeriodicalId\":272619,\"journal\":{\"name\":\"ACM Great Lakes Symposium on VLSI\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ACM Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2591513.2591560\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACM Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2591513.2591560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Built-in generation of functional broadside tests considering primary input constraints
This paper describes a method for built-in generation of functional broadside tests for a circuit that is embedded in a larger design, taking functional constraints on its primary input sequences into account. The constraints are captured by functional input sequences of the design. Specifically, the peak switching activity in the circuit under the functional input sequences is used to bound the switching activity during on-chip test generation.