视频DSP的体系结构及其应用设计方法

VLSI Signal Processing, IX Pub Date : 1996-10-30 DOI:10.1109/VLSISP.1996.558374

K. Nakamura, M. Kurokawa, A. Hashiguchi, M. Kanou, K. Aoyama, H. Okuda, S. Iwase, T. Yamazaki

{"title":"视频DSP的体系结构及其应用设计方法","authors":"K. Nakamura, M. Kurokawa, A. Hashiguchi, M. Kanou, K. Aoyama, H. Okuda, S. Iwase, T. Yamazaki","doi":"10.1109/VLSISP.1996.558374","DOIUrl":null,"url":null,"abstract":"This paper describes the special architecture of the linear array DSP and design methodology for the application to convert sampling rate of the video signals. This methodology allows us to develop a detailed DSP application code for a given sampling conversion rate. Compared to the ASIC implementation of sampling rate conversion, the required time for implementation is drastically reduced. An example of conversion from HDTV to SDTV (wide) is given.","PeriodicalId":290885,"journal":{"name":"VLSI Signal Processing, IX","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Video DSP architecture and its application design methodology for sampling rate conversion\",\"authors\":\"K. Nakamura, M. Kurokawa, A. Hashiguchi, M. Kanou, K. Aoyama, H. Okuda, S. Iwase, T. Yamazaki\",\"doi\":\"10.1109/VLSISP.1996.558374\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the special architecture of the linear array DSP and design methodology for the application to convert sampling rate of the video signals. This methodology allows us to develop a detailed DSP application code for a given sampling conversion rate. Compared to the ASIC implementation of sampling rate conversion, the required time for implementation is drastically reduced. An example of conversion from HDTV to SDTV (wide) is given.\",\"PeriodicalId\":290885,\"journal\":{\"name\":\"VLSI Signal Processing, IX\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"VLSI Signal Processing, IX\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSISP.1996.558374\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Signal Processing, IX","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSISP.1996.558374","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

本文介绍了线性阵列DSP的特殊结构和视频信号采样率转换应用的设计方法。这种方法使我们能够针对给定的采样转换率开发详细的DSP应用代码。与采样率转换的ASIC实现相比，实现所需的时间大大缩短。给出了一个从HDTV到SDTV(宽)转换的实例。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Video DSP architecture and its application design methodology for sampling rate conversion

This paper describes the special architecture of the linear array DSP and design methodology for the application to convert sampling rate of the video signals. This methodology allows us to develop a detailed DSP application code for a given sampling conversion rate. Compared to the ASIC implementation of sampling rate conversion, the required time for implementation is drastically reduced. An example of conversion from HDTV to SDTV (wide) is given.

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VLSI Signal Processing, IX

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