{"title":"一种测量LOC封装中芯片与引线框架粘附性的方法","authors":"S. Ahmad, T. Jiang, W. Moden, C. Breen, J. Reeder","doi":"10.1109/IEMT.1996.559772","DOIUrl":null,"url":null,"abstract":"Adequate die-to-leadframe adhesion is necessary for LOC package integrity during and after manufacturing process. Poor adhesion may result in a variety of defects such as die adhesion failure, marginal wire bond, broken wire, exposed wire at the surface of the plastic encapsulated package, and bent leads, ultimately leading to electrical failure [1,2]. In this paper, a technique to measure the adhesion of leadframes to electronic chips in LOC type packages is described. In this method, the leads on opposite sides of the die are pulled using a universal materials tester (e.g., Instron). We found that sample preparation and measurement equipment set-up were critical to the consistency and repeatability of the measurements. A comparison of measurements on packages bonded with three different materials is presented. Minimum bonding forces required for best yields were determined for these three types of chip-to-leadframe bonding materials. Using this information, we were able to rank materials with respect to their relative adhesion characteristics.","PeriodicalId":177653,"journal":{"name":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A method for the measurement of chip to leadframe adhesion in LOC packages\",\"authors\":\"S. Ahmad, T. Jiang, W. Moden, C. Breen, J. Reeder\",\"doi\":\"10.1109/IEMT.1996.559772\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Adequate die-to-leadframe adhesion is necessary for LOC package integrity during and after manufacturing process. Poor adhesion may result in a variety of defects such as die adhesion failure, marginal wire bond, broken wire, exposed wire at the surface of the plastic encapsulated package, and bent leads, ultimately leading to electrical failure [1,2]. In this paper, a technique to measure the adhesion of leadframes to electronic chips in LOC type packages is described. In this method, the leads on opposite sides of the die are pulled using a universal materials tester (e.g., Instron). We found that sample preparation and measurement equipment set-up were critical to the consistency and repeatability of the measurements. A comparison of measurements on packages bonded with three different materials is presented. Minimum bonding forces required for best yields were determined for these three types of chip-to-leadframe bonding materials. Using this information, we were able to rank materials with respect to their relative adhesion characteristics.\",\"PeriodicalId\":177653,\"journal\":{\"name\":\"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1996.559772\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1996.559772","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A method for the measurement of chip to leadframe adhesion in LOC packages
Adequate die-to-leadframe adhesion is necessary for LOC package integrity during and after manufacturing process. Poor adhesion may result in a variety of defects such as die adhesion failure, marginal wire bond, broken wire, exposed wire at the surface of the plastic encapsulated package, and bent leads, ultimately leading to electrical failure [1,2]. In this paper, a technique to measure the adhesion of leadframes to electronic chips in LOC type packages is described. In this method, the leads on opposite sides of the die are pulled using a universal materials tester (e.g., Instron). We found that sample preparation and measurement equipment set-up were critical to the consistency and repeatability of the measurements. A comparison of measurements on packages bonded with three different materials is presented. Minimum bonding forces required for best yields were determined for these three types of chip-to-leadframe bonding materials. Using this information, we were able to rank materials with respect to their relative adhesion characteristics.