{"title":"S2ADC: 12位,1.25MS/s安全SAR ADC,具有抗功率侧信道攻击能力","authors":"Taehoon Jeong, A. Chandrakasan, Hae-Seung Lee","doi":"10.1109/CICC48029.2020.9075919","DOIUrl":null,"url":null,"abstract":"This paper presents a neural-network-based SAR ADC power side-channel attack (PSA) method and a 12-bit, 1.25MS/s secure SAR ADC whose current equalizers protect the ADC from PSA. A prototype SAR ADC was fabricated in 65nm CMOS to demonstrate the proposed concepts. Without PSA protection, the proposed PSA method decoded the power supply current waveforms of the prototype ADC into the corresponding A/D converter output bits with >99% bit-wise accuracy except for the LSB. With PSA protection, the prototype ADC demonstrated high resistance to the proposed PSA method, showing significant drop in bit-wise accuracy.","PeriodicalId":409525,"journal":{"name":"2020 IEEE Custom Integrated Circuits Conference (CICC)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance\",\"authors\":\"Taehoon Jeong, A. Chandrakasan, Hae-Seung Lee\",\"doi\":\"10.1109/CICC48029.2020.9075919\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a neural-network-based SAR ADC power side-channel attack (PSA) method and a 12-bit, 1.25MS/s secure SAR ADC whose current equalizers protect the ADC from PSA. A prototype SAR ADC was fabricated in 65nm CMOS to demonstrate the proposed concepts. Without PSA protection, the proposed PSA method decoded the power supply current waveforms of the prototype ADC into the corresponding A/D converter output bits with >99% bit-wise accuracy except for the LSB. With PSA protection, the prototype ADC demonstrated high resistance to the proposed PSA method, showing significant drop in bit-wise accuracy.\",\"PeriodicalId\":409525,\"journal\":{\"name\":\"2020 IEEE Custom Integrated Circuits Conference (CICC)\",\"volume\":\"84 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Custom Integrated Circuits Conference (CICC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC48029.2020.9075919\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC48029.2020.9075919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance
This paper presents a neural-network-based SAR ADC power side-channel attack (PSA) method and a 12-bit, 1.25MS/s secure SAR ADC whose current equalizers protect the ADC from PSA. A prototype SAR ADC was fabricated in 65nm CMOS to demonstrate the proposed concepts. Without PSA protection, the proposed PSA method decoded the power supply current waveforms of the prototype ADC into the corresponding A/D converter output bits with >99% bit-wise accuracy except for the LSB. With PSA protection, the prototype ADC demonstrated high resistance to the proposed PSA method, showing significant drop in bit-wise accuracy.