{"title":"基于双功率级阻抗优化的全集成非对称Doherty放大器","authors":"R. Ishikawa, Y. Takayama, K. Honjo","doi":"10.23919/eumc.2018.8541803","DOIUrl":null,"url":null,"abstract":"A fully integrated asymmetric Doherty power amplifier has been developed by using GaN HEMT MMIC technology. To minimize the circuit size, a two-power-level impedance optimization method was applied instead of using a quarter-wavelength transmission line impedance inverter for load modulation in the Doherty amplifier. For this optimization, asymmetric configuration is required to realize optimum impedance conditions. The 4-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 56% and a maximum power-added efficiency (PAE) of 53% at 4.3 GHz, with a saturation output power of 36dBm. In addition, PAE of 44% was achieved at 4.2 GHz on a 6-dB output back-off condition.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fully Integrated Asymmetric Doherty Amplifier Based on Two-Power-Level Impedance Optimization\",\"authors\":\"R. Ishikawa, Y. Takayama, K. Honjo\",\"doi\":\"10.23919/eumc.2018.8541803\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully integrated asymmetric Doherty power amplifier has been developed by using GaN HEMT MMIC technology. To minimize the circuit size, a two-power-level impedance optimization method was applied instead of using a quarter-wavelength transmission line impedance inverter for load modulation in the Doherty amplifier. For this optimization, asymmetric configuration is required to realize optimum impedance conditions. The 4-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 56% and a maximum power-added efficiency (PAE) of 53% at 4.3 GHz, with a saturation output power of 36dBm. In addition, PAE of 44% was achieved at 4.2 GHz on a 6-dB output back-off condition.\",\"PeriodicalId\":248339,\"journal\":{\"name\":\"2018 13th European Microwave Integrated Circuits Conference (EuMIC)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 13th European Microwave Integrated Circuits Conference (EuMIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/eumc.2018.8541803\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/eumc.2018.8541803","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fully Integrated Asymmetric Doherty Amplifier Based on Two-Power-Level Impedance Optimization
A fully integrated asymmetric Doherty power amplifier has been developed by using GaN HEMT MMIC technology. To minimize the circuit size, a two-power-level impedance optimization method was applied instead of using a quarter-wavelength transmission line impedance inverter for load modulation in the Doherty amplifier. For this optimization, asymmetric configuration is required to realize optimum impedance conditions. The 4-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 56% and a maximum power-added efficiency (PAE) of 53% at 4.3 GHz, with a saturation output power of 36dBm. In addition, PAE of 44% was achieved at 4.2 GHz on a 6-dB output back-off condition.
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