{"title":"具有制程容错分段二阶曲率补偿的低于1 ppm/°C的CMOS带隙电压基准","authors":"Yongjoon Ahn, Suhwan Kim, Hyunjoong Lee","doi":"10.1109/socc49529.2020.9524787","DOIUrl":null,"url":null,"abstract":"This paper presents a CMOS high-precision bandgap voltage reference. To obtain low temperature coefficient (TC) regardless of process variation, piecewise second-order curvature compensation method is proposed. Curvature compensation current is generated through current subtraction and current squaring operation with two currents with different dependence on temperature. Also, several circuit techniques are adopted to achieve compensate error sources. Chopping technique is utilized to cancel 1/f noise and DC offset of the error amplifier. Trimming resistor is used to compensate process variation. The bandgap reference is designed in a 0.13µm CMOS process. Post layout simulation shows that TC of the bandgap reference is 0.64ppm/°C over a wide temperature range of -40°C to 125°C. Moreover, sub-1 ppm/°C TC is achieved irrespective of process variation after two-point temperature trimming. The bandgap reference consumes 44µA at 27°C and layout size is 0.0534mm2.","PeriodicalId":114740,"journal":{"name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Sub-1 ppm/°C CMOS Bandgap Voltage Reference With Process Tolerant Piecewise Second-Order Curvature Compensation\",\"authors\":\"Yongjoon Ahn, Suhwan Kim, Hyunjoong Lee\",\"doi\":\"10.1109/socc49529.2020.9524787\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a CMOS high-precision bandgap voltage reference. To obtain low temperature coefficient (TC) regardless of process variation, piecewise second-order curvature compensation method is proposed. Curvature compensation current is generated through current subtraction and current squaring operation with two currents with different dependence on temperature. Also, several circuit techniques are adopted to achieve compensate error sources. Chopping technique is utilized to cancel 1/f noise and DC offset of the error amplifier. Trimming resistor is used to compensate process variation. The bandgap reference is designed in a 0.13µm CMOS process. Post layout simulation shows that TC of the bandgap reference is 0.64ppm/°C over a wide temperature range of -40°C to 125°C. Moreover, sub-1 ppm/°C TC is achieved irrespective of process variation after two-point temperature trimming. The bandgap reference consumes 44µA at 27°C and layout size is 0.0534mm2.\",\"PeriodicalId\":114740,\"journal\":{\"name\":\"2020 IEEE 33rd International System-on-Chip Conference (SOCC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-09-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 33rd International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/socc49529.2020.9524787\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/socc49529.2020.9524787","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Sub-1 ppm/°C CMOS Bandgap Voltage Reference With Process Tolerant Piecewise Second-Order Curvature Compensation
This paper presents a CMOS high-precision bandgap voltage reference. To obtain low temperature coefficient (TC) regardless of process variation, piecewise second-order curvature compensation method is proposed. Curvature compensation current is generated through current subtraction and current squaring operation with two currents with different dependence on temperature. Also, several circuit techniques are adopted to achieve compensate error sources. Chopping technique is utilized to cancel 1/f noise and DC offset of the error amplifier. Trimming resistor is used to compensate process variation. The bandgap reference is designed in a 0.13µm CMOS process. Post layout simulation shows that TC of the bandgap reference is 0.64ppm/°C over a wide temperature range of -40°C to 125°C. Moreover, sub-1 ppm/°C TC is achieved irrespective of process variation after two-point temperature trimming. The bandgap reference consumes 44µA at 27°C and layout size is 0.0534mm2.