增强/耗尽GaAs sisfet

IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings. Pub Date : 1987-08-10 DOI:10.1109/CORNEL.1987.721221

H. Baratte, D. La Tulipe, D. Frank, P. Solomon, T. Jackson, S. Wright

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引用次数: 1

摘要

生长(增强模式)和植入(耗尽模式)的GaAs sisfet采用自对准难熔栅工艺在同一芯片的选择性区域制备。这两种器件具有相似的特性(300K时的跨导率为350mS/mm, 77K时的跨导率为380mS/mm, 300K时的最大漏极电流为350mA/mm, 77K时的最大漏极电流为400mA/mm，栅极长度为0.8/spl mu/m)，栅极漏极低。在77K下，植入的GaAs sisfet的漂移迁移率为20,000 cm/sup 2/V/sup -1s-1/，而生长异质结构的漂移迁移率为150,000 cm/sup 2/V/sup -1s-1/。描述了用这些增强耗尽型GaAs sisfet制造的小电路。

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Enhance / Deplete GaAs SISFETs

As-grown (enhancement-mode) and implanted (depletion-mode) GaAs SISFETs are fabricated in selective areas of the same chip with a self-aligned refractory gate process. Both types of devices have comparable characteristics (transconductances of 350mS/mm at 300K and 380mS/mm at 77K, maximum drain current of 350mA/mm at 300K and 400mA/mm at 77K for 0.8/spl mu/m gate lengths) and low gate leakage. A drift mobility of 20,000 cm/sup 2/V/sup -1s-1/ is measured at 77K for the implanted GaAs SISFETs while 150,000 cm/sup 2/V/sup -1s-1/ is measured for the as-grown heterostructures. Small circuits, fabricated with these enhance-deplete GaAs SISFETs, are de- scribed.

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IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings.

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