INS computer design basing on subdivision technology

The inertial navigation system (INS) computer is a key part in the inertial navigation application. Traditional PC104 computer is of many disadvantages such as fixed board layout and large power dissipation, which makes the system impossible to integrate the functions of signal collecting and navigation computing for reducing the power dissipation and size of board. In this paper, a new INS computer is designed using DSP TMS320C6713 and FPGA XC3S400AN. The computer integrates the signal collecting work by employing pulse subdivision method to avoid ±1 quantization error. Experimental results show that the new INS computer gets good performance on signal collecting (RMS of 10−3) and inertial navigation computing, brings decreased power dissipation (1.5W) as well, which makes it useful in INS application.