用于高密度FRAM的新型1T1C电容器结构

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104) Pub Date : 2000-06-13 DOI:10.1109/VLSIT.2000.852758

N. Jang, Y.J. Song, H.H. Kim, D. Jung, B. Koo, S.Y. Lee, S. Joo, K.M. Lee, K. Kim

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引用次数: 9

摘要

本文首次采用铁电(FE)空穴电容器结构，开发了一种无蚀刻损伤的4mb铁电随机存取存储器(FRAM)集成技术。由于PZT电容器没有蚀刻，因此在新型电容器结构中不会产生蚀刻损伤。这种新型的FE孔结构完全解决了FRAM器件的蚀刻工艺问题，这是FRAM器件缩小的最关键障碍之一。因此，这种新颖的集成技术有望提供可靠的FRAM器件的缩小，超过0.25 /spl mu/m的技术一代。

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A novel 1T1C capacitor structure for high density FRAM

In this paper, an etching damage-free 4 Mb ferroelectric random access memory (FRAM) integration technology was for the first time developed using ferroelectric (FE) hole capacitor structure. Since the PZT capacitors are not etched, no etching damage was generated in the novel capacitor structure. The etching process issue, which is one of most critical obstacles for scaling down FRAM device, is completely resolved by using this novel FE hole structure. Therefore, the novel integration technology strongly promises to provide a reliable scaling down of FRAM device beyond 0.25 /spl mu/m technology generation.

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2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)

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