外延垂直围栅mosfet中的SiGe异质结

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104) Pub Date : 2000-06-13 DOI:10.1109/VLSIT.2000.852759

C. Date, J. Plummer

{"title":"外延垂直围栅mosfet中的SiGe异质结","authors":"C. Date, J. Plummer","doi":"10.1109/VLSIT.2000.852759","DOIUrl":null,"url":null,"abstract":"Vertical MOSFETs are possible future architectures for memory cells as well as alternatives for conventional CMOS devices. The vertical channel allows growth of epitaxial structures, such as heterostructures, before the pillars are etched. We show how incorporation of SiGe heterostructures in vertical MOSFET devices can be used to delay the floating body effect or to modify hot carrier characteristics.","PeriodicalId":268624,"journal":{"name":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"SiGe heterojunctions in epitaxial vertical surrounding-gate MOSFETs\",\"authors\":\"C. Date, J. Plummer\",\"doi\":\"10.1109/VLSIT.2000.852759\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Vertical MOSFETs are possible future architectures for memory cells as well as alternatives for conventional CMOS devices. The vertical channel allows growth of epitaxial structures, such as heterostructures, before the pillars are etched. We show how incorporation of SiGe heterostructures in vertical MOSFET devices can be used to delay the floating body effect or to modify hot carrier characteristics.\",\"PeriodicalId\":268624,\"journal\":{\"name\":\"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2000.852759\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2000.852759","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

垂直mosfet可能是存储单元的未来架构，也是传统CMOS器件的替代品。垂直通道允许在蚀刻柱之前生长外延结构，例如异质结构。我们展示了如何在垂直MOSFET器件中掺入SiGe异质结构来延迟浮体效应或修改热载子特性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

SiGe heterojunctions in epitaxial vertical surrounding-gate MOSFETs

Vertical MOSFETs are possible future architectures for memory cells as well as alternatives for conventional CMOS devices. The vertical channel allows growth of epitaxial structures, such as heterostructures, before the pillars are etched. We show how incorporation of SiGe heterostructures in vertical MOSFET devices can be used to delay the floating body effect or to modify hot carrier characteristics.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)

自引率

0.00%

发文量