一种同时多频带连续时间ΔΣ ADC,总带宽为90mhz,采用40nm CMOS

John Bell, M. Flynn
{"title":"一种同时多频带连续时间ΔΣ ADC,总带宽为90mhz,采用40nm CMOS","authors":"John Bell, M. Flynn","doi":"10.1109/ESSCIRC.2019.8902880","DOIUrl":null,"url":null,"abstract":"This letter presents a new class of ΔΣ modulator that combines any set of traditional NTF shapes in a single modulator. The prototype multiband ΔΣ modulator (MB-ΔΣM) demonstrates two simultaneous bands—one baseband and one bandpass. These two bands are separated by 500 MHz, have an aggregate bandwidth of 90 MHz, with up to 55-dB measured SNDR. In addition to reducing the number of ADCs, this new approach promises further system-level power savings by simplifying the RF frontend. The system-level power savings from requiring fewer analog mixers, LNAs, filters, and ADC drivers can be even more than the ADC power reduction.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Simultaneous Multiband Continuous-Time ΔΣ ADC With 90-MHz Aggregate Bandwidth in 40-nm CMOS\",\"authors\":\"John Bell, M. Flynn\",\"doi\":\"10.1109/ESSCIRC.2019.8902880\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter presents a new class of ΔΣ modulator that combines any set of traditional NTF shapes in a single modulator. The prototype multiband ΔΣ modulator (MB-ΔΣM) demonstrates two simultaneous bands—one baseband and one bandpass. These two bands are separated by 500 MHz, have an aggregate bandwidth of 90 MHz, with up to 55-dB measured SNDR. In addition to reducing the number of ADCs, this new approach promises further system-level power savings by simplifying the RF frontend. The system-level power savings from requiring fewer analog mixers, LNAs, filters, and ADC drivers can be even more than the ADC power reduction.\",\"PeriodicalId\":402948,\"journal\":{\"name\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2019.8902880\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

这封信提出了一个新的类ΔΣ调制器,结合了任何一组传统的NTF形状在一个单一的调制器。原型多波段ΔΣ调制器(MB-ΔΣM)演示了两个同步波段-一个基带和一个带通。这两个频段间隔500 MHz,总带宽为90 MHz,测量SNDR高达55 db。除了减少adc的数量外,这种新方法还通过简化射频前端来进一步节省系统级功耗。需要更少的模拟混频器、lna、滤波器和ADC驱动器所节省的系统级功耗甚至可以超过ADC功耗的降低。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Simultaneous Multiband Continuous-Time ΔΣ ADC With 90-MHz Aggregate Bandwidth in 40-nm CMOS
This letter presents a new class of ΔΣ modulator that combines any set of traditional NTF shapes in a single modulator. The prototype multiband ΔΣ modulator (MB-ΔΣM) demonstrates two simultaneous bands—one baseband and one bandpass. These two bands are separated by 500 MHz, have an aggregate bandwidth of 90 MHz, with up to 55-dB measured SNDR. In addition to reducing the number of ADCs, this new approach promises further system-level power savings by simplifying the RF frontend. The system-level power savings from requiring fewer analog mixers, LNAs, filters, and ADC drivers can be even more than the ADC power reduction.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信