一种面积高效的高速AES S-box方法

Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI:10.1109/IWSOC.2005.37

R. Hobson, Scott Wakelin

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引用次数: 4

摘要

高级加密标准重复使用性能限制随机化步骤SubBytes，它调用S-box逻辑连接来打乱8个数据输入。本文介绍了一种实现S-box(及其变体，称为T-box)逻辑函数的新方法。该方法与以前的方法一样快，但只使用其他快速方法的四分之一的门。此外，该方法可以产生一个差分输出，这有助于加快下游的排他或逻辑。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An area-efficient high-speed AES S-box method

The advanced encryption standard makes repeated use of a performance limiting randomization step, SubBytes, which invokes an S-box logic junction to scramble 8 data inputs. This paper introduces a new method for implementing S-box (and a variant, called T-box) logic functions. The method is as fast as previous methods, but uses only one quarter of the gates of other fast methods. In addition, the method can produce a differential output which helps to speed up downstream exclusive-or logic.

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Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)

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