基于低功率CT二阶vco的ΔΣADC在Skywater 130-nm上录音

Duc-Manh Tran, Duy-Hieu Bui, Xuan-Tu Tran
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引用次数: 0

摘要

本文提出了一种低功耗、高数字的模数转换器(ADC),旨在满足物联网(IoT)片上系统(soc)的音频记录和处理要求。在这项工作中,我们提出了一种应用时间编码技术和二阶噪声整形ΔΣ调制的架构。我们的设计由经过优化的高数字电路组成,以低功耗实现高信噪比和高失真比(SNDR)。通过SPICE仿真验证了该架构的有效性。我们的ADC在24 kHz带宽下的SNDR为80.7 dB-A,相当于12.3有效位数(ENOB)。该ADC采用Skywater 130-nm技术,在1.8 V电源电压下平均功耗为0.16 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Low-Power CT Second-Order VCO-Based ΔΣADC for Audio Recording on Skywater 130-nm
This paper presents a low-power, highly-digital Analog-to-Digital Converter (ADC) that aims to meet the requirements of audio recording and processing for Internet-of-Thing (IoT) System-on-Chips (SoCs). In this work, we propose an architecture applying the time-encoding technique and second-order noise shaping ΔΣ modulation. Our design is composed of highly-digital circuits optimized to reach high Signal-to-Noise and Distortion Ratio (SNDR) with low power consumption. The proposed architecture is verified by SPICE simulation. Our ADC obtains an SNDR of 80.7 dB-A, equivalent to 12.3 Effective Number Of Bits (ENOB) at the bandwidth of 24 kHz. This ADC consumes an average of 0.16 mW at the supply voltage of 1.8 V on Skywater 130-nm technology.
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