用于神经信号采集的前端放大器

2018 IEEE 2nd International Conference on Circuits, System and Simulation (ICCSS) Pub Date : 2018-07-01 DOI:10.1109/CIRSYSSIM.2018.8525890

Ruoyuan Qu, Wei Zhang, Qianqian Lv, Ming Tang

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引用次数: 0

摘要

介绍了一种用于神经处理芯片的运算放大器的结构。由于其特殊用途，从结构层面到器件层面引入了噪声和功耗优化方法。在结构层面，精心设计了电容比例电路，同时实现了闭环增益和带通滤波功能。采用亚阈值mosfet在器件级获得了低噪声和高电阻。该放大器采用中芯国际180nm CMOS工艺制造，在9.2Hz ~ 80k Hz范围内的中频增益为57dB，带宽为−3dB，输入参考噪声为3.06uV，功耗为144w。

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A Front-End Amplifier for Neural Signal Acquisition

A structure of an operational amplifier for neural processing chip is presented in this paper. Due to the special application, noise and power consumption optimization method is introduced from structure level to device level. For structure level, the capacitance proportional circuit is carefully designed to achieve a closed-loop gain and band-pass filtering function at the same time. The adoption of Sub-threshold MOSFETs obtains low noise and high resistance in device level. Fabricated in SMIC 180nm CMOS process, the amplifier yielded a mid-band gain of 57dB and a −3dB bandwidth from 9.2Hz to 80k Hz and input referred noise of 3.06uV while power consumption of 144uW.

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来源期刊

2018 IEEE 2nd International Conference on Circuits, System and Simulation (ICCSS)

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